diff options
| author | Fabio Estevam <fabio.estevam@freescale.com> | 2014-08-25 17:26:44 (GMT) |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-09-09 15:24:49 (GMT) |
| commit | ac17dcf653138cd0e521142fdfdfdff8027d3a04 (patch) | |
| tree | aed0d27a22117edd20486667a7d603a46b2e3588 /arch | |
| parent | 19a895cbe9430e5abe68ef4bd4985cefef6e6347 (diff) | |
| download | u-boot-ac17dcf653138cd0e521142fdfdfdff8027d3a04.tar.xz | |
mx6: imx-regs: Provide a structure for GPC registers
Introduce a structure for accessing the General Power Controller block (GPC)
registers.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 2631beb..22614fc 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -419,6 +419,19 @@ struct iomuxc { u32 gpr[14]; }; +struct gpc { + u32 cntr; + u32 pgr; + u32 imr1; + u32 imr2; + u32 imr3; + u32 imr4; + u32 isr1; + u32 isr2; + u32 isr3; + u32 isr4; +}; + #define IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET 20 #define IOMUXC_GPR2_COUNTER_RESET_VAL_MASK (3<<IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET) #define IOMUXC_GPR2_LVDS_CLK_SHIFT_OFFSET 16 |