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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-06-06 18:44:47 (GMT)
committerSimon Glass <sjg@chromium.org>2017-06-08 03:30:48 (GMT)
commitcf35242a3e6e15c36150c132b3da8032fa21f91b (patch)
tree3757bace83f45eedb7428dd9fce72ef713ffd1c1 /arch
parent6608cf0fbee3f70bb90f12e235fdb73ef54b1f4d (diff)
downloadu-boot-cf35242a3e6e15c36150c132b3da8032fa21f91b.tar.xz
rockchip: dts: rk3399-puma: add DTS for the DDR3-1866 timing
This adds the DDR3-1866 timing via its own DTS and wires it up. This (currently) is not the default timing for the RK3399-Q7 and should be selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/rk3399-puma-ddr1866.dts11
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 540fa25..8b8f5e9 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -48,6 +48,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3399-firefly.dtb \
rk3399-puma-ddr1333.dtb \
rk3399-puma-ddr1600.dtb \
+ rk3399-puma-ddr1866.dtb \
rv1108-evb.dtb
dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-odroidc2.dtb
diff --git a/arch/arm/dts/rk3399-puma-ddr1866.dts b/arch/arm/dts/rk3399-puma-ddr1866.dts
new file mode 100644
index 0000000..4eec8e7
--- /dev/null
+++ b/arch/arm/dts/rk3399-puma-ddr1866.dts
@@ -0,0 +1,11 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+/dts-v1/;
+
+#include "rk3399-puma.dtsi"
+#include "rk3399-sdram-ddr3-1866.dtsi"
+