diff options
author | Hannes Petermaier <oe5hpm@oevsv.at> | 2015-02-03 12:22:26 (GMT) |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2015-03-06 01:13:16 (GMT) |
commit | fbd5aeda481526c5c23cb913461378423bdb2137 (patch) | |
tree | a44f29f8655bdeca02bbd980dcfdd5cb9a11caff /board/BuR/tseries/board.c | |
parent | 1b7caf1123facf67816b03675952a5c700d0db9e (diff) | |
download | u-boot-fbd5aeda481526c5c23cb913461378423bdb2137.tar.xz |
board/BuR/common: Take usage of am335x LCD-Display
a summary screen to the lcd.
Values are taken from environment and or devicetree blob.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Diffstat (limited to 'board/BuR/tseries/board.c')
-rw-r--r-- | board/BuR/tseries/board.c | 52 |
1 files changed, 34 insertions, 18 deletions
diff --git a/board/BuR/tseries/board.c b/board/BuR/tseries/board.c index c0178e7..66747eb 100644 --- a/board/BuR/tseries/board.c +++ b/board/BuR/tseries/board.c @@ -27,6 +27,7 @@ #include <i2c.h> #include <power/tps65217.h> #include "../common/bur_common.h" +#include <lcd.h> DECLARE_GLOBAL_DATA_PTR; @@ -82,7 +83,6 @@ static const struct ctrl_ioregs ddr3_ioregs = { int spl_start_uboot(void) { if (0 == gpio_get_value(REPSWITCH)) { - blink(5, 125, ETHLED_ORANGE); mdelay(1000); printf("SPL: entering u-boot instead kernel image.\n"); return 1; @@ -96,7 +96,35 @@ static const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1}; void am33xx_spl_board_init(void) { - pmicsetup(1000); + struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER; + /*struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;*/ + struct cm_dpll *const cmdpll = (struct cm_dpll *)CM_DPLL; + + /* + * in TRM they write a reset value of 1 (=CLK_M_OSC) for the + * CLKSEL_TIMER6_CLK Register, in fact reset value is 0, so we need set + * the source of timer6 clk to CLK_M_OSC + */ + writel(0x01, &cmdpll->clktimer6clk); + + /* enable additional clocks of modules which are accessed later */ + u32 *const clk_domains[] = { + &cmper->lcdcclkstctrl, + 0 + }; + + u32 *const clk_modules_tsspecific[] = { + &cmper->lcdclkctrl, + &cmper->timer5clkctrl, + &cmper->timer6clkctrl, + 0 + }; + do_enable_clocks(clk_domains, clk_modules_tsspecific, 1); + + /* setup LCD-Pixel Clock */ + writel(0x2, &cmdpll->clklcdcpixelclk); /* clock comes from perPLL M2 */ + + pmicsetup(0); } const struct dpll_params *get_dpll_ddr_params(void) @@ -126,24 +154,12 @@ int board_init(void) #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { - gpio_direction_output(ETHLED_ORANGE, 0); - if (0 == gpio_get_value(REPSWITCH)) { - printf("\n\n\n" - "!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n" - "!!!!!!! recovery switch activated !!!!!!!\n" - "!!!!!!! running usbupdate !!!!!!!\n" - "!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n\n\n"); - setenv("bootcmd", "sleep 2; run netupdate;"); + lcd_position_cursor(1, 8); + lcd_puts( + "switching to network-console ... "); + setenv("bootcmd", "run netconsole"); } - - printf("turning on display power+backlight ... "); - tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_WLEDCTRL1, - 0x09, TPS65217_MASK_ALL_BITS); /* 200 Hz, ON */ - tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_WLEDCTRL2, - 0x62, TPS65217_MASK_ALL_BITS); /* 100% */ - printf("ok.\n"); - return 0; } #endif /* CONFIG_BOARD_LATE_INIT */ |