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author | Stefan Roese <sr@denx.de> | 2007-10-03 05:48:09 (GMT) |
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committer | Stefan Roese <sr@denx.de> | 2007-10-31 20:20:49 (GMT) |
commit | 026f71106871f31d17d0ea0db9a7547ff92934bc (patch) | |
tree | 1c83a6f38a830c8825eb69b529f565ab93a368dd /board/amcc/katmai/katmai.c | |
parent | c7c6da23028f146d912514b95aefa3da7cf37699 (diff) | |
download | u-boot-026f71106871f31d17d0ea0db9a7547ff92934bc.tar.xz |
ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (2)
This patch is the first patch of a series to make the 440SPe PCIe code
usable on different 4xx PPC platforms. In preperation for the new 405EX
which is also equipped with PCIe interfaces.
(2) This patch renames the functions from 440spe_ to 4xx_ with a
little additional cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/katmai/katmai.c')
-rw-r--r-- | board/amcc/katmai/katmai.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c index 0c8e6cb..f1c352c 100644 --- a/board/amcc/katmai/katmai.c +++ b/board/amcc/katmai/katmai.c @@ -35,9 +35,6 @@ DECLARE_GLOBAL_DATA_PTR; -int ppc440spe_init_pcie_rootport(int port); -void ppc440spe_setup_pcie(struct pci_controller *hose, int port); - int board_early_init_f (void) { unsigned long mfr; @@ -409,9 +406,9 @@ void pcie_setup_hoses(int busno) continue; #ifdef PCIE_ENDPOINT - if (ppc440spe_init_pcie_endport(i)) { + if (ppc4xx_init_pcie_endport(i)) { #else - if (ppc440spe_init_pcie_rootport(i)) { + if (ppc4xx_init_pcie_rootport(i)) { #endif printf("PCIE%d: initialization failed\n", i); continue; @@ -433,13 +430,13 @@ void pcie_setup_hoses(int busno) pci_register_hose(hose); #ifdef PCIE_ENDPOINT - ppc440spe_setup_pcie_endpoint(hose, i); + ppc4xx_setup_pcie_endpoint(hose, i); /* * Reson for no scanning is endpoint can not generate * upstream configuration accesses. */ #else - ppc440spe_setup_pcie_rootpoint(hose, i); + ppc4xx_setup_pcie_rootpoint(hose, i); env = getenv ("pciscandelay"); if (env != NULL) { |