diff options
| author | Heiko Schocher <hs@denx.de> | 2014-07-18 04:07:22 (GMT) |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-07-23 10:31:34 (GMT) |
| commit | e379c03902e55aed2533f569727e006d3ec4b9c3 (patch) | |
| tree | f99744819670b05ca2e32183f18eb4f08284a7ac /board/aristainetos/clocks.cfg | |
| parent | 562f8df18da62ae02c4ace1e530451fe82c3312d (diff) | |
| download | u-boot-e379c03902e55aed2533f569727e006d3ec4b9c3.tar.xz | |
arm, imx6: add aristainetos board
CPU: Freescale i.MX6DL rev1.1 at 792 MHz
Board: aristaitenos
I2C: ready
DRAM: 1 GiB
NAND: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Display: lb07wv8 (800x480)
- UART5 is console
- MMC 0 and 1
- USB 0 and 1
- boot from mmc0 and spi nor flash
- Splash screen support
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'board/aristainetos/clocks.cfg')
| -rw-r--r-- | board/aristainetos/clocks.cfg | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/board/aristainetos/clocks.cfg b/board/aristainetos/clocks.cfg new file mode 100644 index 0000000..651449e --- /dev/null +++ b/board/aristainetos/clocks.cfg @@ -0,0 +1,24 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00c03f3f +DATA 4, CCM_CCGR1, 0x0030fcff +DATA 4, CCM_CCGR2, 0x0fffcfc0 +DATA 4, CCM_CCGR3, 0x3ff0300f +DATA 4, CCM_CCGR4, 0xfffff30c /* enable NAND/GPMI/BCH clocks */ +DATA 4, CCM_CCGR5, 0x0f0000c3 +DATA 4, CCM_CCGR6, 0x000003ff |