diff options
author | Ryan Harkin <ryan.harkin@linaro.org> | 2015-11-18 10:39:06 (GMT) |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2015-11-22 02:50:27 (GMT) |
commit | bc8d3bc0233df4f72172ae1552c8fa55e83538f8 (patch) | |
tree | 4a9a6e46c56f4ae5b289aa52122fa11c07b5b7d8 /board/armltd/vexpress64 | |
parent | 0ee1a22b6dbf30158718ab59f294bf1103f63121 (diff) | |
download | u-boot-bc8d3bc0233df4f72172ae1552c8fa55e83538f8.tar.xz |
vexpress64: compile Juno PCIe conditionally
Only compile in PCIe support if the board really uses it. Provide
a __weak stub for the init function if e.g. FVP is being built.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'board/armltd/vexpress64')
-rw-r--r-- | board/armltd/vexpress64/Makefile | 3 | ||||
-rw-r--r-- | board/armltd/vexpress64/pcie.c | 2 | ||||
-rw-r--r-- | board/armltd/vexpress64/vexpress64.c | 7 |
3 files changed, 9 insertions, 3 deletions
diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile index a35db40..b4391a7 100644 --- a/board/armltd/vexpress64/Makefile +++ b/board/armltd/vexpress64/Makefile @@ -5,4 +5,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y := vexpress64.o pcie.o +obj-y := vexpress64.o +obj-$(CONFIG_TARGET_VEXPRESS64_JUNO) += pcie.o diff --git a/board/armltd/vexpress64/pcie.c b/board/armltd/vexpress64/pcie.c index eb23dd5..b3fb09c 100644 --- a/board/armltd/vexpress64/pcie.c +++ b/board/armltd/vexpress64/pcie.c @@ -191,7 +191,5 @@ void xr3pci_init(void) void vexpress64_pcie_init(void) { -#ifdef CONFIG_TARGET_VEXPRESS64_JUNO xr3pci_init(); -#endif } diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index f4e8084..3add099 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -28,6 +28,13 @@ U_BOOT_DEVICE(vexpress_serials) = { .platdata = &serial_platdata, }; +/* This function gets replaced by platforms supporting PCIe. + * The replacement function, eg. on Juno, initialises the PCIe bus. + */ +__weak void vexpress64_pcie_init(void) +{ +} + int board_init(void) { vexpress64_pcie_init(); |