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author | Eric Nelson <eric.nelson@boundarydevices.com> | 2013-03-11 08:44:53 (GMT) |
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committer | Stefano Babic <sbabic@denx.de> | 2013-03-13 08:04:24 (GMT) |
commit | d67b0d97b156f9ec2fc4c838d84b1e510d6e49b4 (patch) | |
tree | d3d87c2b266c5e1c743abc7e0151d0e00da65c3c /board/boundary/nitrogen6x/clocks.cfg | |
parent | 7315e3bf2cc95abf9ae53f43ccbd31c6f638aacd (diff) | |
download | u-boot-d67b0d97b156f9ec2fc4c838d84b1e510d6e49b4.tar.xz |
Add Boundary Devices Nitrogen6X boards
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Diffstat (limited to 'board/boundary/nitrogen6x/clocks.cfg')
-rw-r--r-- | board/boundary/nitrogen6x/clocks.cfg | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/board/boundary/nitrogen6x/clocks.cfg b/board/boundary/nitrogen6x/clocks.cfg new file mode 100644 index 0000000..e7d1f86 --- /dev/null +++ b/board/boundary/nitrogen6x/clocks.cfg @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00C03F3F +DATA 4, CCM_CCGR1, 0x0030FC03 +DATA 4, CCM_CCGR2, 0x0FFFC000 +DATA 4, CCM_CCGR3, 0x3FF00000 +DATA 4, CCM_CCGR4, 0x00FFF300 +DATA 4, CCM_CCGR5, 0x0F0000C3 +DATA 4, CCM_CCGR6, 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4, MX6_IOMUXC_GPR6, 0x007F007F +DATA 4, MX6_IOMUXC_GPR7, 0x007F007F |