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| author | Paul Burton <paul.burton@imgtec.com> | 2016-05-27 13:28:05 (GMT) |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-05-31 07:44:24 (GMT) |
| commit | 372286217f050bfd57695001d59f618c52822f40 (patch) | |
| tree | e2d926d936e6d65f2a229b19a347435f9f1d8d56 /board/dbau1x00 | |
| parent | ace3be4f15875d74344336b9754c14274f940969 (diff) | |
| download | u-boot-372286217f050bfd57695001d59f618c52822f40.tar.xz | |
MIPS: Split I & D cache line size config
Allow L1 Icache & L1 Dcache line size to be specified separately, since
there's no architectural mandate that they be the same. The
[id]cache_line_size functions are tidied up to take advantage of the
fact that the Kconfig entries are always present to simply check them
for zero rather than needing to #ifdef on their presence.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
[removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'board/dbau1x00')
| -rw-r--r-- | board/dbau1x00/Kconfig | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/board/dbau1x00/Kconfig b/board/dbau1x00/Kconfig index 1715a28..448176d 100644 --- a/board/dbau1x00/Kconfig +++ b/board/dbau1x00/Kconfig @@ -15,10 +15,13 @@ config SYS_TEXT_BASE config SYS_DCACHE_SIZE default 16384 +config SYS_DCACHE_LINE_SIZE + default 32 + config SYS_ICACHE_SIZE default 16384 -config SYS_CACHELINE_SIZE +config SYS_ICACHE_LINE_SIZE default 32 menu "dbau1x00 board options" |