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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 13:01:15 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 19:54:03 (GMT) |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/etin/debris | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | u-boot-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.xz |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/etin/debris')
-rw-r--r-- | board/etin/debris/debris.c | 6 | ||||
-rw-r--r-- | board/etin/debris/flash.c | 12 | ||||
-rw-r--r-- | board/etin/debris/phantom.c | 2 |
3 files changed, 10 insertions, 10 deletions
diff --git a/board/etin/debris/debris.c b/board/etin/debris/debris.c index a5d394c..227c49a 100644 --- a/board/etin/debris/debris.c +++ b/board/etin/debris/debris.c @@ -63,7 +63,7 @@ phys_size_t initdram (int board_type) uint32_t mear2 = 0, emear2 = 0, msar2 = 0, emsar2 = 0; uint8_t mber = 0; - i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); if (i2c_reg_read (0x50, 2) != 0x04) return 0; /* Memory type */ m = i2c_reg_read (0x50, 5); /* # of physical banks */ @@ -74,7 +74,7 @@ phys_size_t initdram (int board_type) CONFIG_READ_WORD(MCCR1, mccr1); mccr1 &= 0xffff0000; - start = CFG_SDRAM_BASE; + start = CONFIG_SYS_SDRAM_BASE; end = start + (1 << (col + row + 3) ) * bank - 1; for (i = 0; i < m; i++) { @@ -174,7 +174,7 @@ void nvram_write(long dest, const void *src, size_t count) int misc_init_r(void) { /* Write ethernet addr in NVRAM for VxWorks */ - nvram_write(CONFIG_ENV_ADDR + CFG_NVRAM_VXWORKS_OFFS, + nvram_write(CONFIG_ENV_ADDR + CONFIG_SYS_NVRAM_VXWORKS_OFFS, (char*)&gd->bd->bi_enetaddr[0], 6); return 0; } diff --git a/board/etin/debris/flash.c b/board/etin/debris/flash.c index a4100e5..a3c8138 100644 --- a/board/etin/debris/flash.c +++ b/board/etin/debris/flash.c @@ -71,7 +71,7 @@ static uint16_t cfi_read_query(flash_info_t *flash, uint32_t addr) return (uint16_t)read32(base + addr); } -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ static void move64(uint64_t *src, uint64_t *dest) { @@ -99,7 +99,7 @@ static int cfi_write_dword(flash_info_t *flash, ulong dest, cfi_word data) status &= CMD(0x80); if(status == CMD(0x80)) break; - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { cfi_cmd(flash, 0xff, 0); return 1; } @@ -128,7 +128,7 @@ static int jedec_write_dword (flash_info_t *flash, ulong dest, cfi_word data) start = get_timer (0); status = ~data; while(status != data) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) return 1; status = cfi_read(flash, dest); udelay(1); @@ -230,7 +230,7 @@ static int cfi_erase_oneblock(flash_info_t *flash, uint32_t sect) status &= CMD(0x80); if (status == CMD(0x80)) break; - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { cfi_cmd(flash, 0xff, 0); printf ("Timeout\n"); return ERR_TIMOUT; @@ -296,7 +296,7 @@ static int jedec_erase(flash_info_t *flash, uint32_t s_first, uint32_t s_last) if (status == CMD(0xffff)) break; - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); return ERR_TIMOUT; } @@ -581,7 +581,7 @@ unsigned long flash_init (void) mtdbat1u(0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP); set_msr(msr); - for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) flash_info[i].flash_id = FLASH_UNKNOWN; size = cfi_init(FLASH_BASE0_PRELIM, &flash_info[0]); if (!size) diff --git a/board/etin/debris/phantom.c b/board/etin/debris/phantom.c index 48b81f7..fcb4c40 100644 --- a/board/etin/debris/phantom.c +++ b/board/etin/debris/phantom.c @@ -20,7 +20,7 @@ #if defined(CONFIG_CMD_DATE) -#define RTC_BASE (CFG_NVRAM_BASE_ADDR + 0x7fff8) +#define RTC_BASE (CONFIG_SYS_NVRAM_BASE_ADDR + 0x7fff8) #define RTC_YEAR ( RTC_BASE + 7 ) #define RTC_MONTH ( RTC_BASE + 6 ) |