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author | York Sun <yorksun@freescale.com> | 2015-12-04 19:57:08 (GMT) |
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committer | York Sun <yorksun@freescale.com> | 2015-12-15 00:57:33 (GMT) |
commit | c107c0c05c988ac6cfba6de60c90f105bbea0e1e (patch) | |
tree | 5c3c98cf44b3e8991687875e985ce4d73485a3cf /board/freescale/c29xpcie | |
parent | e81495224f732f17ae6f379baf23b90cd1d5cb5f (diff) | |
download | u-boot-c107c0c05c988ac6cfba6de60c90f105bbea0e1e.tar.xz |
armv8: fsl-layerscape: Make DDR non secure in MMU tables
DDR has been set as secure in MMU tables. Non-secure master such
as SDHC DMA cannot access data correctly. Mixing secure and non-
secure MMU entries requirs the MMU tables themselves in secure
memory. This patch moves MMU tables into a secure DDR area.
Early MMU tables are changed to set DDR as non-secure. A new
table is added into final MMU tables so secure memory can have
2MB granuality.
gd->secure_ram tracks the location of this secure memory. For
ARMv8 SoCs, the RAM base is not zero and RAM is divided into several
banks. gd->secure_ram needs to be maintained before using. This
maintenance is board-specific, depending on the SoC and memory
bank of the secure memory falls into.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/c29xpcie')
0 files changed, 0 insertions, 0 deletions