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authorKumar Gala <galak@kernel.crashing.org>2011-08-30 22:29:23 (GMT)
committerKumar Gala <galak@kernel.crashing.org>2011-09-30 00:01:06 (GMT)
commit360275b362e50f480b09c7c8770019ea4287afad (patch)
treed8f9e2c2544aee2836469731a734494f8e2c753a /board/freescale/corenet_ds/Makefile
parent9570cbda76e751efbaff53cfb31fa7b34e3c5807 (diff)
downloadu-boot-360275b362e50f480b09c7c8770019ea4287afad.tar.xz
powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
We currently support 4 SoC/Boards from the P-Series of QorIQ SoCs that are based on the 'CoreNet' Architecture: P2041RDB, P3041DS, P4080DS, and P5020DS. There is a significant amount of commonality shared between these boards that we can refactor into common code: * Initial LAW setup * Initial TLB setup * PCI setup We start by moving the shared code between P3041DS, P4080DS, and P5020DS into a common directory to be shared with other P-Series CoreNet boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/corenet_ds/Makefile')
-rw-r--r--board/freescale/corenet_ds/Makefile3
1 files changed, 0 insertions, 3 deletions
diff --git a/board/freescale/corenet_ds/Makefile b/board/freescale/corenet_ds/Makefile
index c377c39..7e33007 100644
--- a/board/freescale/corenet_ds/Makefile
+++ b/board/freescale/corenet_ds/Makefile
@@ -34,9 +34,6 @@ COBJS-$(CONFIG_P5020DS) += eth_hydra.o
COBJS-$(CONFIG_P3041DS) += p3041ds_ddr.o
COBJS-$(CONFIG_P4080DS) += p4080ds_ddr.o
COBJS-$(CONFIG_P5020DS) += p5020ds_ddr.o
-COBJS-$(CONFIG_PCI) += pci.o
-COBJS-y += law.o
-COBJS-y += tlb.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))