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authorYork Sun <york.sun@nxp.com>2017-03-06 17:02:28 (GMT)
committerYork Sun <york.sun@nxp.com>2017-03-14 15:44:03 (GMT)
commit36cc0de0b919c0e185739142742e0a76a7c5c30a (patch)
tree23c4bf83f6b7546e45df69ebfc1161549fbf3284 /board/freescale/ls1012aqds/ls1012aqds.c
parent426337455e06c2d05c40f48e488b95a12e4aa056 (diff)
downloadu-boot-36cc0de0b919c0e185739142742e0a76a7c5c30a.tar.xz
armv8: layerscape: Rewrite memory reservation
For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1012aqds/ls1012aqds.c')
-rw-r--r--board/freescale/ls1012aqds/ls1012aqds.c29
1 files changed, 0 insertions, 29 deletions
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 4281790..fbda504 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -166,32 +166,3 @@ int ft_board_setup(void *blob, bd_t *bd)
return 0;
}
#endif
-
-void dram_init_banksize(void)
-{
- /*
- * gd->arch.secure_ram tracks the location of secure memory.
- * It was set as if the memory starts from 0.
- * The address needs to add the offset of its bank.
- */
- gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
- if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) {
- gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE;
- gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE;
- gd->bd->bi_dram[1].size = gd->ram_size -
- CONFIG_SYS_DDR_BLOCK1_SIZE;
-#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
- gd->arch.secure_ram = gd->bd->bi_dram[1].start +
- gd->arch.secure_ram -
- CONFIG_SYS_DDR_BLOCK1_SIZE;
- gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
-#endif
- } else {
- gd->bd->bi_dram[0].size = gd->ram_size;
-#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
- gd->arch.secure_ram = gd->bd->bi_dram[0].start +
- gd->arch.secure_ram;
- gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
-#endif
- }
-}