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| author | Claudiu Manoil <claudiu.manoil@freescale.com> | 2015-08-12 10:29:14 (GMT) |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-09-02 02:39:03 (GMT) |
| commit | ebe4c1e6469444753bd2ba93fe63e6183cf2905c (patch) | |
| tree | cec6f84bbbdf284f6abceb121663b07b2f4b2a61 /board/freescale/ls1021aqds/ls1021aqds_qixis.h | |
| parent | da2919b4a904411c374a6e0d9dc771e180968266 (diff) | |
| download | u-boot-ebe4c1e6469444753bd2ba93fe63e6183cf2905c.tar.xz | |
ls102xa: etsec: Use proper settings for BE BDs
Replace the DMACTRL[LE] hack with recommended settings
for ETSECDMAMCR to get the same end effect - obtaining
big-endian buffer descriptors and frame data for eTSEC.
The reset / default value for ETSECDMAMCR is preserved,
excepting the BD and FR bits which are cleared to enable
the BE mode in accordance with the H/W specifications.
Fixes: 52d00a8 "ls102xa: etsec: Add etsec support for LS102xA"
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Tested-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/ls1021aqds/ls1021aqds_qixis.h')
0 files changed, 0 insertions, 0 deletions