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authorYork Sun <york.sun@nxp.com>2017-03-06 17:02:34 (GMT)
committerYork Sun <york.sun@nxp.com>2017-03-14 15:44:03 (GMT)
commit4961eafc25d0bfa7ac5f88ec78a7f7501c202fbb (patch)
treef1e66358f067240368b3b3b70514f7b8b3c49dc5 /board/freescale/ls1043aqds
parent7f9b9f318ff152bd8d2e8b573708e2bdc088c1b1 (diff)
downloadu-boot-4961eafc25d0bfa7ac5f88ec78a7f7501c202fbb.tar.xz
armv8: layerscape: Update early MMU for DDR after initialization
In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1043aqds')
-rw-r--r--board/freescale/ls1043aqds/ls1043aqds.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index 8835a49..6507c09 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -11,6 +11,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/fdt.h>
+#include <asm/arch/mmu.h>
#include <asm/arch/soc.h>
#include <ahci.h>
#include <hwconfig.h>
@@ -153,6 +154,10 @@ int dram_init(void)
*/
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
gd->ram_size = initdram(0);
+#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
+ /* This will break-before-make MMU for DDR */
+ update_early_mmu_table();
+#endif
return 0;
}