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authorBecky Bruce <becky.bruce@freescale.com>2008-10-31 22:14:14 (GMT)
committerJon Loeliger <jdl@freescale.com>2008-11-03 17:04:59 (GMT)
commitaf5d100e8d5cd49d69d52d20f1181eb06ddb4ddf (patch)
treee87e4fec18a8e9521008009ec4059d08005734b8 /board/freescale/mpc8641hpcn/mpc8641hpcn.c
parent98693b85d42ff438375dc6d6dcadc70eb7b050bb (diff)
downloadu-boot-af5d100e8d5cd49d69d52d20f1181eb06ddb4ddf.tar.xz
mpc8641: Make PCI and RIO mutually exclusive, fix non-PCI build
You can't actually have both, and with some coming changes to change the memory map for the board and support 36-bit physical, we need the extra BAT that is being consumed by having both. I also make non-PCI configs build cleanly, for the sake of sanity. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Diffstat (limited to 'board/freescale/mpc8641hpcn/mpc8641hpcn.c')
-rw-r--r--board/freescale/mpc8641hpcn/mpc8641hpcn.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index a03ca74..5af5c4b 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -135,17 +135,16 @@ extern void fsl_pci_init(struct pci_controller *hose);
void pci_init_board(void)
{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- uint devdisr = gur->devdisr;
- uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
- >> MPC8641_PORDEVSR_IO_SEL_SHIFT;
-
#ifdef CONFIG_PCI1
{
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
struct pci_controller *hose = &pci1_hose;
struct pci_region *r = hose->regions;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
+ volatile ccsr_gur_t *gur = &immap->im_gur;
+ uint devdisr = gur->devdisr;
+ uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
+ >> MPC8641_PORDEVSR_IO_SEL_SHIFT;
#ifdef DEBUG
uint host1_agent = (gur->porbmsr & MPC8641_PORBMSR_HA)