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authorYork Sun <york.sun@nxp.com>2016-11-17 22:10:14 (GMT)
committerYork Sun <york.sun@nxp.com>2016-11-24 07:42:09 (GMT)
commitb0c98b4b9f2eb8180eb1c4cc4164294267d8ec27 (patch)
tree583942955774d7704a3beaab01f43c24a07dabbc /board/freescale/p1_p2_rdb_pc
parent4eedabfe9327ec5d8dc34a9f337a54022491baeb (diff)
downloadu-boot-b0c98b4b9f2eb8180eb1c4cc4164294267d8ec27.tar.xz
powerpc: P1025RDB: Separate from P1_P2_RDB_PC in Kconfig
Use TARGET_P1025RDB instead of sharing with P1_P2_RDB_PC to simplify Kconfig and config macros. Remove macro CONFIG_P1025RDB. Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/p1_p2_rdb_pc')
-rw-r--r--board/freescale/p1_p2_rdb_pc/Kconfig3
-rw-r--r--board/freescale/p1_p2_rdb_pc/ddr.c2
-rw-r--r--board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c8
3 files changed, 7 insertions, 6 deletions
diff --git a/board/freescale/p1_p2_rdb_pc/Kconfig b/board/freescale/p1_p2_rdb_pc/Kconfig
index 91ba21e..f02549e 100644
--- a/board/freescale/p1_p2_rdb_pc/Kconfig
+++ b/board/freescale/p1_p2_rdb_pc/Kconfig
@@ -4,7 +4,8 @@ if TARGET_P1_P2_RDB_PC || \
TARGET_P1020RDB_PD || \
TARGET_P1020UTM || \
TARGET_P1021RDB || \
- TARGET_P1024RDB
+ TARGET_P1024RDB || \
+ TARGET_P1025RDB
config SYS_BOARD
default "p1_p2_rdb_pc"
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c
index 446935e..44ab123 100644
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -147,7 +147,7 @@ dimm_params_t ddr_raw_timing = {
.tfaw_ps = 37500,
};
#elif defined(CONFIG_TARGET_P1024RDB) || \
- defined(CONFIG_P1025RDB)
+ defined(CONFIG_TARGET_P1025RDB)
/*
* Samsung K4B2G0846C-HCH9
* The following timing are for "downshift"
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 44e8e02..51217c5 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -47,7 +47,7 @@
#define GPIO_2BIT_MASK (0x3 << (32 - (GPIO_DDR_RST_PIN + 1) * 2))
#endif
-#if defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
+#if defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
#define PCA_IOPORT_I2C_ADDR 0x23
#define PCA_IOPORT_OUTPUT_CMD 0x2
#define PCA_IOPORT_CFG_CMD 0x6
@@ -65,7 +65,7 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
{GPIO_GETH_SW_PORT, GPIO_GETH_SW_PIN, 1, 0, 0}, /* RST_GETH_SW_N */
{GPIO_SLIC_PORT, GPIO_SLIC_PIN, 1, 0, 0}, /* RST_SLIC_N */
-#ifdef CONFIG_P1025RDB
+#ifdef CONFIG_TARGET_P1025RDB
/* QE_MUX_MDC */
{1, 19, 1, 0, 1}, /* QE_MUX_MDC */
@@ -379,7 +379,7 @@ int board_eth_init(bd_t *bis)
}
#if defined(CONFIG_QE) && \
- (defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB))
+ (defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB))
static void fdt_board_fixup_qe_pins(void *blob)
{
unsigned int oldbus;
@@ -448,7 +448,7 @@ int ft_board_setup(void *blob, bd_t *bd)
#ifdef CONFIG_QE
do_fixup_by_compat(blob, "fsl,qe", "status", "okay",
sizeof("okay"), 0);
-#if defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
+#if defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
fdt_board_fixup_qe_pins(blob);
#endif
#endif