diff options
| author | Zhao Qiang <qiang.zhao@nxp.com> | 2016-09-08 04:55:32 (GMT) |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-10-14 17:21:03 (GMT) |
| commit | ec90ac7359a10513f1458ad5840858e6d8be0624 (patch) | |
| tree | 5ee891cc978fb64d9327d880749399f0acba931d /board/freescale/t102xrdb | |
| parent | 44afdc4a12b9f6f48338e7975e4f08cfe90dba74 (diff) | |
| download | u-boot-ec90ac7359a10513f1458ad5840858e6d8be0624.tar.xz | |
Txxx/RCW: Split unified RCW to RCWs for sd, spi and nand.
T series boards use unified RCW for sd, spi and nand boot.
Now split txxx_rcw.cfg to txxx_sd_rcw.cfg, txxx_spi_rcw.cfg
and txxx_nand_rcw.cfg for SPI/NAND/SD boot.
And modify RCW[PBI_SRC] for them:
PBI_SRC=5 for SPI 24-bit addressing
PBI_SRC=6 for SD boot
PBI_SRC=14 for IFC NAND boot
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/t102xrdb')
| -rw-r--r-- | board/freescale/t102xrdb/t1023_nand_rcw.cfg (renamed from board/freescale/t102xrdb/t1023_rcw.cfg) | 0 | ||||
| -rw-r--r-- | board/freescale/t102xrdb/t1023_sd_rcw.cfg | 8 | ||||
| -rw-r--r-- | board/freescale/t102xrdb/t1023_spi_rcw.cfg | 8 | ||||
| -rw-r--r-- | board/freescale/t102xrdb/t1024_nand_rcw.cfg (renamed from board/freescale/t102xrdb/t1024_rcw.cfg) | 0 | ||||
| -rw-r--r-- | board/freescale/t102xrdb/t1024_sd_rcw.cfg | 8 | ||||
| -rw-r--r-- | board/freescale/t102xrdb/t1024_spi_rcw.cfg | 8 |
6 files changed, 32 insertions, 0 deletions
diff --git a/board/freescale/t102xrdb/t1023_rcw.cfg b/board/freescale/t102xrdb/t1023_nand_rcw.cfg index f8f7282..f8f7282 100644 --- a/board/freescale/t102xrdb/t1023_rcw.cfg +++ b/board/freescale/t102xrdb/t1023_nand_rcw.cfg diff --git a/board/freescale/t102xrdb/t1023_sd_rcw.cfg b/board/freescale/t102xrdb/t1023_sd_rcw.cfg new file mode 100644 index 0000000..dbf8fba --- /dev/null +++ b/board/freescale/t102xrdb/t1023_sd_rcw.cfg @@ -0,0 +1,8 @@ +#PBL preamble and RCW header for T1023RDB +aa55aa55 010e0100 +#SerDes Protocol: 0x77 +#Default Core=1200MHz, DDR=1600MT/s with single source clock +0810000c 00000000 00000000 00000000 +3b800003 00000012 68104000 21000000 +00000000 00000000 00000000 00022800 +00000130 04020200 00000000 00000006 diff --git a/board/freescale/t102xrdb/t1023_spi_rcw.cfg b/board/freescale/t102xrdb/t1023_spi_rcw.cfg new file mode 100644 index 0000000..5edcdb5 --- /dev/null +++ b/board/freescale/t102xrdb/t1023_spi_rcw.cfg @@ -0,0 +1,8 @@ +#PBL preamble and RCW header for T1023RDB +aa55aa55 010e0100 +#SerDes Protocol: 0x77 +#Default Core=1200MHz, DDR=1600MT/s with single source clock +0810000c 00000000 00000000 00000000 +3b800003 00000012 58104000 21000000 +00000000 00000000 00000000 00022800 +00000130 04020200 00000000 00000006 diff --git a/board/freescale/t102xrdb/t1024_rcw.cfg b/board/freescale/t102xrdb/t1024_nand_rcw.cfg index cd6f906..cd6f906 100644 --- a/board/freescale/t102xrdb/t1024_rcw.cfg +++ b/board/freescale/t102xrdb/t1024_nand_rcw.cfg diff --git a/board/freescale/t102xrdb/t1024_sd_rcw.cfg b/board/freescale/t102xrdb/t1024_sd_rcw.cfg new file mode 100644 index 0000000..05b3f37 --- /dev/null +++ b/board/freescale/t102xrdb/t1024_sd_rcw.cfg @@ -0,0 +1,8 @@ +#PBL preamble and RCW header for T1024RDB +aa55aa55 010e0100 +#SerDes Protocol: 0x95 +#Core/DDR: 1400Mhz/1600MT/s with single source clock +0810000c 00000000 00000000 00000000 +4a800003 80000012 6c027000 21000000 +00000000 00000000 00000000 00030810 +00000000 0b005a08 00000000 00000006 diff --git a/board/freescale/t102xrdb/t1024_spi_rcw.cfg b/board/freescale/t102xrdb/t1024_spi_rcw.cfg new file mode 100644 index 0000000..8b695b4 --- /dev/null +++ b/board/freescale/t102xrdb/t1024_spi_rcw.cfg @@ -0,0 +1,8 @@ +#PBL preamble and RCW header for T1024RDB +aa55aa55 010e0100 +#SerDes Protocol: 0x95 +#Core/DDR: 1400Mhz/1600MT/s with single source clock +0810000c 00000000 00000000 00000000 +4a800003 80000012 5c027000 21000000 +00000000 00000000 00000000 00030810 +00000000 0b005a08 00000000 00000006 |