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authorJason Jin <Jason.jin@freescale.com>2011-04-18 09:54:04 (GMT)
committerjason <jason@jason-ThinkPad-T61.(none)>2011-09-04 14:46:55 (GMT)
commit6752da6b2612c56e37bd8e9e176a7fedf4607bcc (patch)
tree26b35dfe08d53b54818e588e760f54d3a36d8f40 /board/freescale
parentf73e7d67ed5accc945f4e4f24a7312826f87cab5 (diff)
downloadu-boot-6752da6b2612c56e37bd8e9e176a7fedf4607bcc.tar.xz
ColdFire:Add mb for 5253 dram initialization
The dram initialization sequence should be in order. This patch add mb for the dram intialization code to make sure the compiler do not disorder the code. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Diffstat (limited to 'board/freescale')
-rw-r--r--board/freescale/m5253demo/m5253demo.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c
index 4772074..8ffb2cc 100644
--- a/board/freescale/m5253demo/m5253demo.c
+++ b/board/freescale/m5253demo/m5253demo.c
@@ -27,6 +27,7 @@
#include <common.h>
#include <asm/immap.h>
#include <netdev.h>
+#include <asm/io.h>
int checkboard(void)
{
@@ -63,10 +64,12 @@ phys_size_t initdram(int board_type)
__asm__("nop");
mbar_writeLong(MCFSIM_DACR0, 0x0000322c);
+ mb();
__asm__("nop");
/* Write to this block to initiate precharge */
*(u32 *) (CONFIG_SYS_SDRAM_BASE) = 0xa5a5a5a5;
+ mb();
__asm__("nop");
/* Set RE bit in DACR */
@@ -83,6 +86,7 @@ phys_size_t initdram(int board_type)
__asm__("nop");
*(u32 *) (CONFIG_SYS_SDRAM_BASE + 0x800) = 0xa5a5a5a5;
+ mb();
}
return dramsize;