diff options
| author | Shaohui Xie <Shaohui.Xie@nxp.com> | 2016-10-28 06:24:02 (GMT) |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-11-21 17:20:32 (GMT) |
| commit | fdc2b54cb864210437010ef84934b3d04bb723c6 (patch) | |
| tree | 3a65a505ae33009426b2a86490658446d214845c /board/freescale | |
| parent | 9b46213b4f63578be2fbcf6b0532a0a8d4b5edb0 (diff) | |
| download | u-boot-fdc2b54cb864210437010ef84934b3d04bb723c6.tar.xz | |
armv8: ls1046aqds: add lpuart support
LPUART0 is used by default, and it's using platform clock.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/ls1046aqds/ls1046aqds.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index 8c18538..552365b 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -120,6 +120,13 @@ unsigned long get_board_ddr_clk(void) return 66666666; } +#ifdef CONFIG_LPUART +u32 get_lpuart_clk(void) +{ + return gd->bus_clk; +} +#endif + int select_i2c_ch_pca9547(u8 ch) { int ret; @@ -157,6 +164,9 @@ int board_early_init_f(void) struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; u32 usb_pwrfault; #endif +#ifdef CONFIG_LPUART + u8 uart; +#endif #ifdef CONFIG_SYS_I2C_EARLY_INIT i2c_early_init_f(); @@ -175,6 +185,14 @@ int board_early_init_f(void) out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); #endif +#ifdef CONFIG_LPUART + /* We use lpuart0 as system console */ + uart = QIXIS_READ(brdcfg[14]); + uart &= ~CFG_UART_MUX_MASK; + uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT; + QIXIS_WRITE(brdcfg[14], uart); +#endif + return 0; } |