diff options
author | wdenk <wdenk> | 2004-04-23 20:32:05 (GMT) |
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committer | wdenk <wdenk> | 2004-04-23 20:32:05 (GMT) |
commit | 5cf91d6bdc3e60bd43f9ba1bbb97a43ee49b2b2d (patch) | |
tree | 5fe88f0a967da1a8d4f073b27294be5fa939c19d /board/icecube/icecube.c | |
parent | e35745bb64fae64da3e1fa7f4afe3213287f5908 (diff) | |
download | u-boot-5cf91d6bdc3e60bd43f9ba1bbb97a43ee49b2b2d.tar.xz |
* Modify KUP4X board configuration to use SL811 driver for USB memory
sticks (including FAT / VFAT filesystem support)
* Add SL811 Host Controller Interface driver for USB
* Add CFG_I2C_EEPROM_ADDR_OVERFLOW desription to README
* Patch by Pantelis Antoniou, 19 Apr 2004:
Allow to use shell style syntax (i. e. ${var} ) with standard parser.
Minor patches for Intracom boards.
* Patch by Christian Pell, 19 Apr 2004:
cleanup support for CF/IDE on PCMCIA for PXA25X
Diffstat (limited to 'board/icecube/icecube.c')
-rw-r--r-- | board/icecube/icecube.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 5a206c0..15def0c 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -42,7 +42,7 @@ static void sdram_start (int hi_addr) /* unlock mode register */ *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit; __asm__ volatile ("sync"); - + /* precharge all banks */ *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit; __asm__ volatile ("sync"); @@ -68,7 +68,7 @@ static void sdram_start (int hi_addr) /* set mode register */ *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE; __asm__ volatile ("sync"); - + /* normal operation */ *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit; __asm__ volatile ("sync"); @@ -88,7 +88,7 @@ long int initdram (int board_type) ulong dramsize2 = 0; #ifndef CFG_RAMBOOT ulong test1, test2; - + /* setup SDRAM chip selects */ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */ *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */ @@ -121,7 +121,7 @@ long int initdram (int board_type) if (dramsize < (1 << 20)) { dramsize = 0; } - + /* set SDRAM CS0 size according to the amount of RAM found */ if (dramsize > 0) { *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1; @@ -129,7 +129,6 @@ long int initdram (int board_type) *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */ } - /* let SDRAM CS1 start right after CS0 */ *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */ @@ -144,12 +143,12 @@ long int initdram (int board_type) } else { dramsize2 = test2; } - + /* memory smaller than 1MB is impossible */ if (dramsize2 < (1 << 20)) { dramsize2 = 0; } - + /* set SDRAM CS1 size according to the amount of RAM found */ if (dramsize2 > 0) { *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize @@ -188,7 +187,7 @@ long int initdram (int board_type) ulong dramsize = 0; #ifndef CFG_RAMBOOT ulong test1, test2; - + /* setup and enable SDRAM chip selects */ *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000; *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */ @@ -217,7 +216,7 @@ long int initdram (int board_type) /* set SDRAM end address according to size */ *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15); - + #else /* CFG_RAMBOOT */ /* Retrieve amount of SDRAM available */ |