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author | Tom Rini <trini@konsulko.com> | 2016-09-21 18:50:18 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2016-09-21 18:50:18 (GMT) |
commit | 423620b9d47a704124f9fd624b4de4ed56c600d6 (patch) | |
tree | 78fbffeb39460482565bd75fd32ad4ae1a9cd135 /board/imgtec/xilfpga/xilfpga.c | |
parent | f85fad024f208ceedb3ce0bb1819936e62a0983e (diff) | |
parent | 31d36f748c52b22833aa946f6c406cc8fb2f1908 (diff) | |
download | u-boot-423620b9d47a704124f9fd624b4de4ed56c600d6.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-mips
Diffstat (limited to 'board/imgtec/xilfpga/xilfpga.c')
-rw-r--r-- | board/imgtec/xilfpga/xilfpga.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/board/imgtec/xilfpga/xilfpga.c b/board/imgtec/xilfpga/xilfpga.c new file mode 100644 index 0000000..77a1952 --- /dev/null +++ b/board/imgtec/xilfpga/xilfpga.c @@ -0,0 +1,20 @@ +/* + * Imagination Technologies MIPSfpga platform code + * + * Copyright (C) 2016, Imagination Technologies Ltd. + * + * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> + * + * SPDX-License-Identifier: GPL-2.0+ + * + */ + +#include <common.h> + +/* initialize the DDR Controller and PHY */ +phys_size_t initdram(int board_type) +{ + /* MIG IP block is smart and doesn't need SW + * to do any init */ + return CONFIG_SYS_SDRAM_SIZE; /* in bytes */ +} |