diff options
| author | Valentin Longchamp <valentin.longchamp@keymile.com> | 2013-10-18 09:47:24 (GMT) |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-10-24 16:36:26 (GMT) |
| commit | 877bfe37dc00b0ae59f37742954a62bce3fdf3a0 (patch) | |
| tree | f0ea1e47a471cd0e255f55090d63c7286347dc8f /board/keymile/kmp204x/pbi.cfg | |
| parent | 935b402eaec0f78ffdafd614aa8176a777d8b6d9 (diff) | |
| download | u-boot-877bfe37dc00b0ae59f37742954a62bce3fdf3a0.tar.xz | |
mpc85xx: introduce the kmp204x reference design support
This patch introduces the support for Keymile's kmp204x reference
design. This design is based on Freescale's P2040/P2041 SoC.
The peripherals used by this design are:
- DDR3 RAM with SPD support
- SPI NOR Flash as boot medium
- NAND Flash
- 2 PCIe busses (hosts 1 and 3)
- 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5)
- 3 Local Bus windows, with one dedicated to the QRIO reset/power mgmt
FPGA
- 2 HW I2C busses
- last but not least, the mandatory serial port
The board/keymile/kmp204x code is mostly based on Freescale's P2041rdb
support and was changed according to our design (that means essentially
removing what is not present on the designs and a few adaptations).
There is currently only one prototype board that is based on this design
and this patch also introduces it. The board is called kmlion1.
Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
kmp204x: update the ENV #define
The comments had to be refined as well as the total size
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: fix ddr.c]
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/keymile/kmp204x/pbi.cfg')
| -rw-r--r-- | board/keymile/kmp204x/pbi.cfg | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/board/keymile/kmp204x/pbi.cfg b/board/keymile/kmp204x/pbi.cfg new file mode 100644 index 0000000..f38dcf9 --- /dev/null +++ b/board/keymile/kmp204x/pbi.cfg @@ -0,0 +1,35 @@ +# +# Copyright 2012 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# +# Refer docs/README.pblimage for more details about how-to configure +# and create PBL boot image +# + +#PBI commands +#Initialize CPC1 as 1MB SRAM +09010000 00200400 +09138000 00000000 +091380c0 00000100 +09010100 00000000 +09010104 fff0000b +09010f00 08000000 +09010000 80000000 +#Configure LAW for CPC1 +09000d00 00000000 +09000d04 fff00000 +09000d08 81000013 +09000010 00000000 +09000014 ff000000 +09000018 81000000 +#Initialize eSPI controller, default configuration is slow for eSPI to +#load data, this configuration comes from u-boot eSPI driver. +09110000 80000403 +09110020 27170008 +09110024 00100008 +09110028 00100008 +0911002c 00100008 +#Flush PBL data +09138000 00000000 +091380c0 00000000 |