diff options
author | Yuri Tikhonov <yur@pollux.denx.de> | 2008-02-04 13:10:42 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2008-03-18 20:59:23 (GMT) |
commit | 65b20dcefc89618193fa51947968dada91e4c778 (patch) | |
tree | ce351c46ffa7f80cd38cb87270cd805c64bccc80 /board/lwmon5/lwmon5.c | |
parent | 8dc3b2303d2b57c774b609ca0e7043ed8f9b88c1 (diff) | |
download | u-boot-65b20dcefc89618193fa51947968dada91e4c778.tar.xz |
The patch adds new POST tests for the Lwmon5 board.
These are:
* External Watchdog test;
* dsPIC tests;
* FPGA test;
* GDC test;
* Sysmon tests.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Diffstat (limited to 'board/lwmon5/lwmon5.c')
-rw-r--r-- | board/lwmon5/lwmon5.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c index 815c01f..73d5de5 100644 --- a/board/lwmon5/lwmon5.c +++ b/board/lwmon5/lwmon5.c @@ -96,6 +96,25 @@ int board_early_init_f(void) gpio_write_bit(CFG_GPIO_FLASH_WP, 1); +#if CONFIG_POST & CFG_POST_BSPEC1 + gpio_write_bit(CFG_GPIO_HIGHSIDE, 1); + + reg = 0; /* reuse as counter */ + out_be32((void *)CFG_DSPIC_TEST_ADDR, + in_be32((void *)CFG_DSPIC_TEST_ADDR) + & ~CFG_DSPIC_TEST_MASK); + while (!gpio_read_in_bit(CFG_GPIO_DSPIC_READY) && reg++ < 1000) { + udelay(1000); + } + gpio_write_bit(CFG_GPIO_HIGHSIDE, 0); + if (gpio_read_in_bit(CFG_GPIO_DSPIC_READY)) { + /* set "boot error" flag */ + out_be32((void *)CFG_DSPIC_TEST_ADDR, + in_be32((void *)CFG_DSPIC_TEST_ADDR) | + CFG_DSPIC_TEST_MASK); + } +#endif + /* * Reset PHY's: * The PHY's need a 2nd reset pulse, since the MDIO address is latched |