diff options
| author | Mark Jackson <mpfj-list@mimc.co.uk> | 2009-08-11 10:33:47 (GMT) |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2009-08-11 11:58:26 (GMT) |
| commit | 54e399f110bbaa24e662e6dd9e88ddb86989d668 (patch) | |
| tree | d59955d98df52ca6faf80f77ba1db36c711a2101 /board/mimc | |
| parent | eb1a4d0a471505c169bef19a73a60f8641f0b875 (diff) | |
| download | u-boot-54e399f110bbaa24e662e6dd9e88ddb86989d668.tar.xz | |
MIMC200: reduce LCD pixclock
The initial pixclock for the MIMC200 board is wrong (and causes
screen corruption due to DMA underruns).
This patch simply reduces the pixel clock to fix the problem.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Diffstat (limited to 'board/mimc')
| -rw-r--r-- | board/mimc/mimc200/mimc200.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c index b773c1a..0dcacb9 100644 --- a/board/mimc/mimc200/mimc200.c +++ b/board/mimc/mimc200/mimc200.c @@ -38,7 +38,7 @@ vidinfo_t panel_info = { .vl_col = 480, /* Number of columns */ .vl_row = 272, /* Number of rows */ - .vl_clk = 10000000, /* pixel clock in ps */ + .vl_clk = 5000000, /* pixel clock in ps */ .vl_sync = ATMEL_LCDC_INVCLK_INVERTED | ATMEL_LCDC_INVLINE_INVERTED | ATMEL_LCDC_INVFRAME_INVERTED, |