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authorYork Sun <yorksun@freescale.com>2014-09-08 19:20:01 (GMT)
committerYork Sun <yorksun@freescale.com>2014-09-25 15:36:19 (GMT)
commit8bfa301b0a30f57888d2117767b23f168760bc40 (patch)
tree623535f20c95354efb54eb2313393bd3499cbfe4 /board/ppmc8260
parent40f8dec54d7803975aed1c88327002c95ea99908 (diff)
downloadu-boot-8bfa301b0a30f57888d2117767b23f168760bc40.tar.xz
ARMv8/ls2085a: Enable secondary cores
Spin table is at the very beginning of boot code. Each core has an individual release address within the spin table, the ft_cpu_setup fn updates the "cpu-release-addr" property of each cpu node with the corresponding release address. Also fix CPU_RELEASE_ADDR to point to secondary_boot_func. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
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