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authorSoeren Moch <smoch@web.de>2016-11-27 15:02:19 (GMT)
committerStefano Babic <sbabic@denx.de>2016-11-29 15:33:50 (GMT)
commit84a62ca85d559c94779e985ea5e071aec3395bc5 (patch)
treeede900e314ce59b21b6a8f5f5966c9f8e79c2bb3 /board/tbs/tbs2910
parent15fde0fc11f93f19f40c9cda36e7c8d4848d9c75 (diff)
downloadu-boot-84a62ca85d559c94779e985ea5e071aec3395bc5.tar.xz
tbs2910: Make Ethernet functional again
Configure the PHY to output a 125MHz clk from CLK_25M and set tx clock delay. This patch is similar to commit 4b6035da482cccda06aeb419634f99937c9fc783 ("mx6sabresd: Make Ethernet functional again"). Signed-off-by: Soeren Moch <smoch@web.de>
Diffstat (limited to 'board/tbs/tbs2910')
-rw-r--r--board/tbs/tbs2910/tbs2910.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c
index 0d9d17a..db0c58f 100644
--- a/board/tbs/tbs2910/tbs2910.c
+++ b/board/tbs/tbs2910/tbs2910.c
@@ -359,6 +359,39 @@ static void setup_display(void)
}
#endif /* CONFIG_VIDEO_IPUV3 */
+static int ar8035_phy_fixup(struct phy_device *phydev)
+{
+ unsigned short val;
+
+ /* To enable AR8035 ouput a 125MHz clk from CLK_25M */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
+
+ val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
+ val &= 0xffe3;
+ val |= 0x18;
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
+
+ /* introduce tx clock delay */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
+ val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
+ val |= 0x0100;
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
+
+ return 0;
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+ ar8035_phy_fixup(phydev);
+
+ if (phydev->drv->config)
+ phydev->drv->config(phydev);
+
+ return 0;
+}
+
int board_eth_init(bd_t *bis)
{
setup_iomux_enet();