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author | Minkyu Kang <mk7.kang@samsung.com> | 2014-10-07 10:14:03 (GMT) |
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committer | Minkyu Kang <mk7.kang@samsung.com> | 2014-10-07 10:14:03 (GMT) |
commit | 3cc83f9d08a80fddf4c1e8e766eff8273f30814c (patch) | |
tree | 831246a1b77d26d0296a84c90684e0fee0368737 /board/ti/ks2_evm/ddr3_k2hk.c | |
parent | 64f41212d880f3d00c6994d973aadeec5bda1b65 (diff) | |
parent | 6dd0e7c00bfa5ce861a72b8e4a3ef9e787306125 (diff) | |
download | u-boot-3cc83f9d08a80fddf4c1e8e766eff8273f30814c.tar.xz |
Merge branch 'uboot'
Diffstat (limited to 'board/ti/ks2_evm/ddr3_k2hk.c')
-rw-r--r-- | board/ti/ks2_evm/ddr3_k2hk.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/board/ti/ks2_evm/ddr3_k2hk.c b/board/ti/ks2_evm/ddr3_k2hk.c index 21a5a0a..6070a99 100644 --- a/board/ti/ks2_evm/ddr3_k2hk.c +++ b/board/ti/ks2_evm/ddr3_k2hk.c @@ -81,4 +81,8 @@ void ddr3_init(void) while (1) ; } + + /* Apply the workaround for PG 1.0 and 1.1 Silicons */ + if (cpu_revision() <= 1) + ddr3_err_reset_workaround(); } |