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author | Stephen Warren <swarren@nvidia.com> | 2014-03-21 18:28:59 (GMT) |
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committer | Tom Warren <twarren@nvidia.com> | 2014-04-17 15:41:05 (GMT) |
commit | 803d01edc27b0ec23a0b0416a65a6106c8b79103 (patch) | |
tree | c8630633201240c7f1cc4c5df6ff408499a3fe24 /board/xaeniax/xaeniax.c | |
parent | 70ad375ee444645001d3ca78bb17790b50232999 (diff) | |
download | u-boot-803d01edc27b0ec23a0b0416a65a6106c8b79103.tar.xz |
ARM: tegra: Tegra30 pinmux cleanup
This renames all the pinmux pins, drive groups, and functions so they
have a prefix which matches the type name. These lists are also auto-
generated using scripts that were also used to generate the kernel
pinctrl drivers. This ensures that the lists are consistent between the
two.
The entries in tegra30_pingroups[] are all updated to remove the columns
which are no longer used.
All affected code is updated to match.
This introduces a few changes to pin/group/function naming and the set of
available functions for each pin. The new values now exactly match the
TRM; the chip documentation. I adjusted one entry in
pinmux-config-cardhu.h due to this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/xaeniax/xaeniax.c')
0 files changed, 0 insertions, 0 deletions