* Patch by Dave Ellis, 22 May 2003:

  Fix problem with only partially cleared .bss segment

* Patch by Rune Torgersen, 12 May 2003:
  get PCI to work on a MPC8266ADS board; incorporate change to
  cpu/mpc8260/pci.c to enable overrides of PCI memory parameters

6 files changed, 55 insertions, 23 deletions

diff --git a/board/cray/L1/Makefile b/board/cray/L1/Makefile
index 4c09edd..e7dc0a8 100644
--- a/board/cray/L1/Makefile
+++ b/board/cray/L1/Makefile
@@ -25,21 +25,21 @@ include $(TOPDIR)/config.mk
 
 LIB	= lib$(BOARD).a
 
-OBJS	= $(BOARD).o flash.o bootscript.o
+OBJS	= $(BOARD).o flash.o
 SOBJS	= init.o 
 
-$(LIB):	$(OBJS) $(SOBJS)
+# HACK: depend needs bootscript.c, which needs tools/mkimage, which is not
+# built in the depend stage.  So... put bootscript.o here, not in OBJS
+$(LIB):	$(OBJS) $(SOBJS) bootscript.o
 	$(AR) crv $@ $^
 
 clean:
-	rm -f $(SOBJS) $(OBJS) bootscript.c bootscript.image
+	rm -f $(SOBJS) $(OBJS) bootscript.c bootscript.image bootscript.o
 
 distclean:	clean
 	rm -f $(LIB) core *.bak .depend
 
-$(BOARD).o: $(BOARD).c bootscript.o
-
-bootscript.o: bootscript.c
+$(BOARD).o : $(BOARD).c bootscript.o
 
 bootscript.c: bootscript.image
 	od -t x1 -v -A x $^ | awk -f x2c.awk > $@
diff --git a/board/fads/fads.c b/board/fads/fads.c
index 3b97f51..8714689 100644
--- a/board/fads/fads.c
+++ b/board/fads/fads.c
@@ -208,6 +208,7 @@ int checkboard (void)
 	case 0x22 :
 	case 0x23 :
 	case 0x24 :
+	case 0x2a :
 	case 0x3f :
 		puts ("FADS");
 		break;
diff --git a/board/fads/flash.c b/board/fads/flash.c
index 50b496e..22a7c41 100644
--- a/board/fads/flash.c
+++ b/board/fads/flash.c
@@ -147,7 +147,7 @@ static void flash_get_offsets (ulong base, flash_info_t *info)
 	int i;
 
 	/* set up sector start address table */
-	if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
+	if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040 || (info->flash_id & FLASH_TYPEMASK) == FLASH_AM080 ) {
 		/* set sector offsets for uniform sector type	*/
 		for (i = 0; i < info->sector_count; i++) {
 			info->start[i] = base + (i * 0x00040000);
@@ -179,6 +179,8 @@ void flash_print_info  (flash_info_t *info)
 	{
 		case FLASH_AM040:	printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n");
 			break;
+		case FLASH_AM080:	printf ("29F080 or 29LV080 (8 Mbit, uniform sectors)\n");
+		                	break;
 		case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
 					break;
 		case FLASH_AM400T:	printf ("AM29LV400T (4 Mbit, top boot sector)\n");
@@ -278,6 +280,12 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
 			info->size = 0x00200000;
 			break;				/* => 2 MB		*/
 
+		case AMD_ID_F080B:
+			info->flash_id += FLASH_AM080;
+			info->sector_count =16;
+			info->size = 0x00400000;
+			break;				/* => 4 MB		*/
+
 		case AMD_ID_LV400T:
 			info->flash_id += FLASH_AM400T;
 			info->sector_count = 11;
diff --git a/board/mpc8266ads/config.mk b/board/mpc8266ads/config.mk
index 9d55598..ecc2a7d 100644
--- a/board/mpc8266ads/config.mk
+++ b/board/mpc8266ads/config.mk
@@ -27,6 +27,6 @@
 # mpc8260ads board
 #
 
-TEXT_BASE = 0xfff00000
+TEXT_BASE = 0xfe000000
 
 PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/mpc8266ads/flash.c b/board/mpc8266ads/flash.c
index 5ec6e33..b876d1c 100644
--- a/board/mpc8266ads/flash.c
+++ b/board/mpc8266ads/flash.c
@@ -55,7 +55,7 @@ static int clear_block_lock_bit(vu_long * addr);
 
 unsigned long flash_init (void)
 {
-#ifndef CONFIG_MPC8260ADS
+#ifndef CONFIG_MPC8266ADS
 	volatile immap_t	*immap  = (immap_t *)CFG_IMMR;
 	volatile memctl8xx_t	*memctl = &immap->im_memctl;
 	volatile ip860_bcsr_t	*bcsr   = (ip860_bcsr_t *)BCSR_BASE;
@@ -66,7 +66,7 @@ unsigned long flash_init (void)
 	/* Init: enable write,
 	 * or we cannot even write flash commands
 	 */
-#ifndef CONFIG_MPC8260ADS
+#ifndef CONFIG_MPC8266ADS
 	bcsr->bd_ctrl |= BD_CTRL_FLWE;
 #endif
 
@@ -86,7 +86,7 @@ unsigned long flash_init (void)
 			size, size<<20);
 	}
 
-#ifndef CONFIG_MPC8260ADS
+#ifndef CONFIG_MPC8266ADS
 	/* Remap FLASH according to real size */
 	memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000);
 	memctl->memc_br1 = (CFG_FLASH_BASE & BR_BA_MSK) |
diff --git a/board/mpc8266ads/mpc8266ads.c b/board/mpc8266ads/mpc8266ads.c
index 796b37d..3e34828 100644
--- a/board/mpc8266ads/mpc8266ads.c
+++ b/board/mpc8266ads/mpc8266ads.c
@@ -32,6 +32,7 @@
 #include <ioports.h>
 #include <i2c.h>
 #include <mpc8260.h>
+#include <pci.h>
 
 /*
  * PBI Page Based Interleaving
@@ -155,8 +156,8 @@ const iop_conf_t iop_conf_tab[4][32] = {
 	/* PC13 */ {   0,   0,   0,   1,   0,   0   }, /* PC13 */
 	/* PC12 */ {   0,   1,   0,   1,   0,   0   }, /* PC12 */
 	/* PC11 */ {   0,   0,   0,   1,   0,   0   }, /* LXT971 transmit control */
-	/* PC10 */ {   1,   1,   0,   0,   0,   0   }, /* LXT970 FETHMDC */
-	/* PC9  */ {   1,   1,   0,   0,   0,   0   }, /* LXT970 FETHMDIO */
+	/* PC10 */ {   1,   0,   0,   1,   0,   0   }, /* LXT970 FETHMDC */
+	/* PC9  */ {   1,   0,   0,   0,   0,   0   }, /* LXT970 FETHMDIO */
 	/* PC8  */ {   0,   0,   0,   1,   0,   0   }, /* PC8 */
 	/* PC7  */ {   0,   0,   0,   1,   0,   0   }, /* PC7 */
 	/* PC6  */ {   0,   0,   0,   1,   0,   0   }, /* PC6 */
@@ -216,6 +217,11 @@ typedef struct bscr_ {
 	unsigned long bcsr7;
 } bcsr_t;
 
+typedef struct pci_ic_s {
+	unsigned long pci_int_stat;
+	unsigned long pci_int_mask;
+} pci_ic_t;
+
 void reset_phy(void)
 {
     volatile bcsr_t  *bcsr           = (bcsr_t *)CFG_BCSR;
@@ -229,8 +235,13 @@ void reset_phy(void)
 int board_pre_init (void)
 {
     volatile bcsr_t  *bcsr         = (bcsr_t *)CFG_BCSR;
-    bcsr->bcsr1                    = ~FETHIEN & ~RS232EN_1;
+    volatile pci_ic_t *pci_ic      = (pci_ic_t *) CFG_PCI_INT;
+
+    bcsr->bcsr1                    = ~FETHIEN & ~RS232EN_1 & ~RS232EN_2;
 
+    /* mask all PCI interrupts */
+    pci_ic->pci_int_mask |= 0xfff00000;
+    
     return 0;
 }
 
@@ -250,7 +261,7 @@ long int initdram(int board_type)
     uint  psdmr = CFG_PSDMR;
     int i;
 
-    uint   psrt = 14;					/* for no SPD */
+    uint   psrt = 0x21;					/* for no SPD */
     uint   chipselects = 1;				/* for no SPD */
     uint   sdram_size = CFG_SDRAM_SIZE * 1024 * 1024;	/* for no SPD */
     uint   or = CFG_OR2_PRELIM;				/* for no SPD */
@@ -270,7 +281,7 @@ long int initdram(int board_type)
     int    j;
 
     /* Keep the compiler from complaining about potentially uninitialized vars */
-    data_width = chipselects = rows = banks = cols = caslatency = psrt = 0;
+    data_width = rows = banks = cols = caslatency = 0;
 
     /*
      * Read the SDRAM SPD EEPROM via I2C.
@@ -294,17 +305,18 @@ long int initdram(int board_type)
 		{
 			/*
 				 * Refresh rate: this assumes the prescaler is set to
-			 * approximately 1uSec per tick.
+			 * approximately 0.39uSec per tick and the target refresh period 
+			 * is about 85% of maximum.
 			 */
 			switch(data & 0x7F) 
 			{
 					default:
-					case 0:  psrt =  16; /*  15.625uS */  break;
-					case 1:  psrt =   2;  /*   3.9uS   */  break;
-					case 2:  psrt =   6;  /*   7.8uS   */  break;
-					case 3:  psrt =  29;  /*  31.3uS   */  break;
-					case 4:  psrt =  60;  /*  62.5uS   */  break;
-					case 5:  psrt = 120;  /* 125uS     */  break;
+					case 0:  psrt = 0x21; /*  15.625uS */  break;
+					case 1:  psrt = 0x07; /*   3.9uS   */  break;
+					case 2:  psrt = 0x0F; /*   7.8uS   */  break;
+					case 3:  psrt = 0x43; /*  31.3uS   */  break;
+					case 4:  psrt = 0x87; /*  62.5uS   */  break;
+					case 5:  psrt = 0xFF; /* 125uS     */  break;
 			}
 		}
 		else if(j == 17) banks       = data;
@@ -563,3 +575,14 @@ long int initdram(int board_type)
     return (sdram_size * chipselects);
 	/*return (16 * 1024 * 1024);*/
 }
+
+#ifdef	CONFIG_PCI
+struct pci_controller hose;
+
+extern void pci_mpc8250_init(struct pci_controller *);
+
+void pci_init_board(void)
+{
+	pci_mpc8250_init(&hose);
+}
+#endif