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authorShengzhou Liu <Shengzhou.Liu@nxp.com>2016-09-01 06:50:36 (GMT)
committerYork Sun <york.sun@nxp.com>2016-09-14 21:08:15 (GMT)
commit93a6d3284ca635496c6de097e49cadc8f62e6256 (patch)
treeae55aeca2e29d0c1e6d6321cbdb6606bf253645e /board
parent214ffae02d03cd548549c6390eb9c19b9e6b085f (diff)
downloadu-boot-93a6d3284ca635496c6de097e49cadc8f62e6256.tar.xz
armv7:ls1021a: Enable workaround for DDR erratum A-009942
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/ls1021atwr/ls1021atwr.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 4638bed..d96fd77 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -142,7 +142,7 @@ int checkboard(void)
void ddrmc_init(void)
{
struct ccsr_ddr *ddr = (struct ccsr_ddr *)CONFIG_SYS_FSL_DDR_ADDR;
- u32 temp_sdram_cfg;
+ u32 temp_sdram_cfg, tmp;
out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG);
@@ -189,6 +189,11 @@ void ddrmc_init(void)
out_be32(&ddr->ddr_zq_cntl, DDR_DDR_ZQ_CNTL);
out_be32(&ddr->cs0_config_2, DDR_CS0_CONFIG_2);
+
+ /* DDR erratum A-009942 */
+ tmp = in_be32(&ddr->debug[28]);
+ out_be32(&ddr->debug[28], tmp | 0x0070006f);
+
udelay(1);
#ifdef CONFIG_DEEP_SLEEP