Merge branch 'master' of /home/stefan/git/u-boot/u-boot

23 files changed, 400 insertions, 280 deletions

diff --git a/board/MigoR/Makefile b/board/MigoR/Makefile
index bced511..661b59d 100644
--- a/board/MigoR/Makefile
+++ b/board/MigoR/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-OBJS	:= migo_r.o
+COBJS	:= migo_r.o
 SOBJS	:= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/apollon/apollon.c b/board/apollon/apollon.c
index 7e39817..8efa703 100644
--- a/board/apollon/apollon.c
+++ b/board/apollon/apollon.c
@@ -153,10 +153,8 @@ void ether_init(void)
 	do {
 		__raw_writew(0x1, LAN_RESET_REGISTER);
 		udelay(100);
-		if (cnt == 0) {
-			printf("1. eth reset err\n");
+		if (cnt == 0)
 			goto eth_reset_err_out;
-		}
 		--cnt;
 	} while (__raw_readw(LAN_RESET_REGISTER) != 0x1);
 
@@ -165,10 +163,8 @@ void ether_init(void)
 	do {
 		__raw_writew(0x0, LAN_RESET_REGISTER);
 		udelay(100);
-		if (cnt == 0) {
-			printf("2. eth reset err\n");
+		if (cnt == 0)
 			goto eth_reset_err_out;
-		}
 		--cnt;
 	} while (__raw_readw(LAN_RESET_REGISTER) != 0x0000);
 	udelay(1000);
diff --git a/board/cm5200/cm5200.c b/board/cm5200/cm5200.c
index 3e952d8..24e8db0 100644
--- a/board/cm5200/cm5200.c
+++ b/board/cm5200/cm5200.c
@@ -275,7 +275,7 @@ static void ft_blob_update(void *blob, bd_t *bd)
 	ret = fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 
 	if (ret < 0) {
-		printf("ft_blob_update): cannot set /memory/reg "
+		printf("ft_blob_update(): cannot set /memory/reg "
 			"property err:%s\n", fdt_strerror(ret));
 	}
 }
diff --git a/board/davinci/sffsdr/Makefile b/board/davinci/sffsdr/Makefile
index 579efe2..fb31ee4 100644
--- a/board/davinci/sffsdr/Makefile
+++ b/board/davinci/sffsdr/Makefile
@@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= dv_board.o
+COBJS	:= $(BOARD).o
 SOBJS	:= board_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/davinci/sffsdr/config.mk b/board/davinci/sffsdr/config.mk
index e8a329c..f3b23d1 100644
--- a/board/davinci/sffsdr/config.mk
+++ b/board/davinci/sffsdr/config.mk
@@ -3,8 +3,10 @@
 # Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
 # David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
 #
+# Copyright (C) 2008 Lyrtech <www.lyrtech.com>
+# Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
+#
 # Lyrtech SFF SDR board (ARM926EJS) cpu
-# see http://www.lyrtech.com/ for more information on Lyrtech
 #
 # SFF SDR board has 1 bank of 128 MB DDR RAM
 # Physical Address:
@@ -16,9 +18,6 @@
 # Integrity kernel is expected to be at 8000'0000, entry 8000'00D0,
 # up to 81FF'FFFF (uses up to 32 MB of memory for text, heap, etc).
 #
-# we load ourself to 8400'0000
-#
-#
-
-# Provide at least 32MB spacing between us and the Integrity kernel image
+# we load ourself to 8400'0000 to provide at least 32MB spacing
+# between us and the Integrity kernel image
 TEXT_BASE = 0x84000000
diff --git a/board/davinci/sffsdr/dv_board.c b/board/davinci/sffsdr/dv_board.c
deleted file mode 100644
index 0771b5b..0000000
--- a/board/davinci/sffsdr/dv_board.c
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * Parts are shamelessly stolen from various TI sources, original copyright
- * follows:
- * -----------------------------------------------------------------
- *
- * Copyright (C) 2004 Texas Instruments.
- *
- * ----------------------------------------------------------------------------
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- * ----------------------------------------------------------------------------
- */
-
-#include <common.h>
-#include <i2c.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/emac_defs.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-extern void	timer_init(void);
-extern int	eth_hw_init(void);
-extern phy_t	phy;
-
-
-/* Works on Always On power domain only (no PD argument) */
-void lpsc_on(unsigned int id)
-{
-	dv_reg_p	mdstat, mdctl;
-
-	if (id >= DAVINCI_LPSC_GEM)
-		return;			/* Don't work on DSP Power Domain */
-
-	mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
-	mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
-
-	while (REG(PSC_PTSTAT) & 0x01);
-
-	if ((*mdstat & 0x1f) == 0x03)
-		return;			/* Already on and enabled */
-
-	*mdctl |= 0x03;
-
-	/* Special treatment for some modules as for sprue14 p.7.4.2 */
-	if ((id == DAVINCI_LPSC_VPSSSLV) ||
-	    (id == DAVINCI_LPSC_EMAC) ||
-	    (id == DAVINCI_LPSC_EMAC_WRAPPER) ||
-	    (id == DAVINCI_LPSC_MDIO) ||
-	    (id == DAVINCI_LPSC_USB) ||
-	    (id == DAVINCI_LPSC_ATA) ||
-	    (id == DAVINCI_LPSC_VLYNQ) ||
-	    (id == DAVINCI_LPSC_UHPI) ||
-	    (id == DAVINCI_LPSC_DDR_EMIF) ||
-	    (id == DAVINCI_LPSC_AEMIF) ||
-	    (id == DAVINCI_LPSC_MMC_SD) ||
-	    (id == DAVINCI_LPSC_MEMSTICK) ||
-	    (id == DAVINCI_LPSC_McBSP) ||
-	    (id == DAVINCI_LPSC_GPIO))
-		* mdctl |= 0x200;
-
-	REG(PSC_PTCMD) = 0x01;
-
-	while (REG(PSC_PTSTAT) & 0x03);
-	while ((*mdstat & 0x1f) != 0x03);	/* Probably an overkill... */
-}
-
-void dsp_on(void)
-{
-	int	i;
-
-	if (REG(PSC_PDSTAT1) & 0x1f)
-		return;			/* Already on */
-
-	REG(PSC_GBLCTL) |= 0x01;
-	REG(PSC_PDCTL1) |= 0x01;
-	REG(PSC_PDCTL1) &= ~0x100;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
-	REG(PSC_PTCMD) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (REG(PSC_EPCPR) & 0x02)
-			break;
-	}
-
-	REG(PSC_CHP_SHRTSW) = 0x01;
-	REG(PSC_PDCTL1) |= 0x100;
-	REG(PSC_EPCCR) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (!(REG(PSC_PTSTAT) & 0x02))
-			break;
-	}
-
-	REG(PSC_GBLCTL) &= ~0x1f;
-}
-
-
-int board_init(void)
-{
-	/* arch number of the board */
-	gd->bd->bi_arch_number = MACH_TYPE_SFFSDR;
-
-	/* address of boot parameters */
-	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
-
-	/* Workaround for TMS320DM6446 errata 1.3.22 */
-	REG(PSC_SILVER_BULLET) = 0;
-
-	/* Power on required peripherals */
-	lpsc_on(DAVINCI_LPSC_EMAC);
-	lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
-	lpsc_on(DAVINCI_LPSC_MDIO);
-	lpsc_on(DAVINCI_LPSC_I2C);
-	lpsc_on(DAVINCI_LPSC_UART0);
-	lpsc_on(DAVINCI_LPSC_TIMER1);
-	lpsc_on(DAVINCI_LPSC_GPIO);
-
-	/* Powerup the DSP */
-	dsp_on();
-
-	/* Bringup UART0 out of reset */
-	REG(UART0_PWREMU_MGMT) = 0x0000e003;
-
-	/* Enable GIO3.3V cells used for EMAC */
-	REG(VDD3P3V_PWDN) = 0;
-
-	/* Enable UART0 MUX lines */
-	REG(PINMUX1) |= 1;
-
-	/* Enable EMAC and AEMIF pins */
-	REG(PINMUX0) = 0x80000c1f;
-
-	/* Enable I2C pin Mux */
-	REG(PINMUX1) |= (1 << 7);
-
-	/* Set the Bus Priority Register to appropriate value */
-	REG(VBPR) = 0x20;
-
-	timer_init();
-
-	return(0);
-}
-
-int misc_init_r(void)
-{
-	u_int8_t	tmp[20], buf[10];
-	int		i = 0;
-	int		clk = 0;
-
-	clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
-
-	printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2);
-	printf("DDR Clock: %dMHz\n", (clk / 2));
-
-	/* Configure I2C switch (PCA9543) to enable channel 0. */
-	tmp[0] = CFG_I2C_PCA9543_ENABLE_CH0;
-	if (i2c_write(CFG_I2C_PCA9543_ADDR, 0,
-		     CFG_I2C_PCA9543_ADDR_LEN, tmp, 1))
-		printf("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR);
-
-	/* Set Ethernet MAC address from EEPROM.
-	 * We must read 8 bytes because data is stored in little-endian. */
-	if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x05A8,
-		     CFG_I2C_EEPROM_ADDR_LEN, buf, 8)) {
-		printf("Read from EEPROM @ 0x%02x failed\n",
-		       CFG_I2C_EEPROM_ADDR);
-	} else {
-		tmp[0] = 0xff;
-		for (i = 0; i < 6; i++)
-			tmp[0] &= buf[i];
-
-		if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) {
-			sprintf((char *)&tmp[0],
-				"%02x:%02x:%02x:%02x:%02x:%02x",
-				buf[3], buf[2], buf[1], buf[0],
-				buf[7], buf[6]);
-			setenv("ethaddr", (char *)&tmp[0]);
-		}
-	}
-
-	if (!eth_hw_init()) {
-		printf("Ethernet init failed\n");
-	} else {
-		printf("ETH PHY: %s\n", phy.name);
-	}
-
-	return(0);
-}
-
-int dram_init(void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-	return(0);
-}
diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c
new file mode 100644
index 0000000..b73484a
--- /dev/null
+++ b/board/davinci/sffsdr/sffsdr.c
@@ -0,0 +1,310 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
+ * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
+ *
+ * Parts are shamelessly stolen from various TI sources, original copyright
+ * follows:
+ *
+ * Copyright (C) 2004 Texas Instruments.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/emac_defs.h>
+
+#define DAVINCI_A3CR     (0x01E00014)	/* EMIF-A CS3 config register. */
+#define DAVINCI_A3CR_VAL (0x3FFFFFFD)	/* EMIF-A CS3 value for FPGA. */
+
+#define INTEGRITY_SYSCFG_OFFSET    0x7E8
+#define INTEGRITY_CHECKWORD_OFFSET 0x7F8
+#define INTEGRITY_CHECKWORD_VALUE  0x10ADBEEF
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void timer_init(void);
+extern int eth_hw_init(void);
+extern phy_t phy;
+
+
+/* Works on Always On power domain only (no PD argument) */
+void lpsc_on(unsigned int id)
+{
+	dv_reg_p mdstat, mdctl;
+
+	if (id >= DAVINCI_LPSC_GEM)
+		return;			/* Don't work on DSP Power Domain */
+
+	mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
+	mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
+
+	while (REG(PSC_PTSTAT) & 0x01);
+
+	if ((*mdstat & 0x1f) == 0x03)
+		return;			/* Already on and enabled */
+
+	*mdctl |= 0x03;
+
+	/* Special treatment for some modules as for sprue14 p.7.4.2 */
+	switch (id) {
+	case DAVINCI_LPSC_VPSSSLV:
+	case DAVINCI_LPSC_EMAC:
+	case DAVINCI_LPSC_EMAC_WRAPPER:
+	case DAVINCI_LPSC_MDIO:
+	case DAVINCI_LPSC_USB:
+	case DAVINCI_LPSC_ATA:
+	case DAVINCI_LPSC_VLYNQ:
+	case DAVINCI_LPSC_UHPI:
+	case DAVINCI_LPSC_DDR_EMIF:
+	case DAVINCI_LPSC_AEMIF:
+	case DAVINCI_LPSC_MMC_SD:
+	case DAVINCI_LPSC_MEMSTICK:
+	case DAVINCI_LPSC_McBSP:
+	case DAVINCI_LPSC_GPIO:
+		*mdctl |= 0x200;
+		break;
+	}
+
+	REG(PSC_PTCMD) = 0x01;
+
+	while (REG(PSC_PTSTAT) & 0x03);
+	while ((*mdstat & 0x1f) != 0x03);	/* Probably an overkill... */
+}
+
+#if !defined(CFG_USE_DSPLINK)
+void dsp_on(void)
+{
+	int i;
+
+	if (REG(PSC_PDSTAT1) & 0x1f)
+		return;			/* Already on */
+
+	REG(PSC_GBLCTL) |= 0x01;
+	REG(PSC_PDCTL1) |= 0x01;
+	REG(PSC_PDCTL1) &= ~0x100;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
+	REG(PSC_PTCMD) = 0x02;
+
+	for (i = 0; i < 100; i++) {
+		if (REG(PSC_EPCPR) & 0x02)
+			break;
+	}
+
+	REG(PSC_CHP_SHRTSW) = 0x01;
+	REG(PSC_PDCTL1) |= 0x100;
+	REG(PSC_EPCCR) = 0x02;
+
+	for (i = 0; i < 100; i++) {
+		if (!(REG(PSC_PTSTAT) & 0x02))
+			break;
+	}
+
+	REG(PSC_GBLCTL) &= ~0x1f;
+}
+#endif /* CFG_USE_DSPLINK */
+
+int board_init(void)
+{
+	/* arch number of the board */
+	gd->bd->bi_arch_number = MACH_TYPE_SFFSDR;
+
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+	/* Workaround for TMS320DM6446 errata 1.3.22 */
+	REG(PSC_SILVER_BULLET) = 0;
+
+	/* Power on required peripherals */
+	lpsc_on(DAVINCI_LPSC_EMAC);
+	lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
+	lpsc_on(DAVINCI_LPSC_MDIO);
+	lpsc_on(DAVINCI_LPSC_I2C);
+	lpsc_on(DAVINCI_LPSC_UART0);
+	lpsc_on(DAVINCI_LPSC_TIMER1);
+	lpsc_on(DAVINCI_LPSC_GPIO);
+
+#if !defined(CFG_USE_DSPLINK)
+	/* Powerup the DSP */
+	dsp_on();
+#endif /* CFG_USE_DSPLINK */
+
+	/* Bringup UART0 out of reset */
+	REG(UART0_PWREMU_MGMT) = 0x0000e003;
+
+	/* Enable GIO3.3V cells used for EMAC */
+	REG(VDD3P3V_PWDN) = 0;
+
+	/* Enable UART0 MUX lines */
+	REG(PINMUX1) |= 1;
+
+	/* Enable EMAC and AEMIF pins */
+	REG(PINMUX0) = 0x80000c1f;
+
+	/* Enable I2C pin Mux */
+	REG(PINMUX1) |= (1 << 7);
+
+	/* Set the Bus Priority Register to appropriate value */
+	REG(VBPR) = 0x20;
+
+	timer_init();
+
+	return(0);
+}
+
+/* Read ethernet MAC address from Integrity data structure inside EEPROM. */
+int read_mac_address(uint8_t *buf)
+{
+	u_int32_t value, mac[2], address;
+
+	/* Read Integrity data structure checkword. */
+	if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_CHECKWORD_OFFSET,
+		     CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
+		goto err;
+	if (value != INTEGRITY_CHECKWORD_VALUE)
+		return 1;
+
+	/* Read SYSCFG structure offset. */
+	if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET,
+		     CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
+		goto err;
+	address = 0x800 + (int) value; /* Address of SYSCFG structure. */
+
+	/* Read NET CONFIG structure offset. */
+	if (i2c_read(CFG_I2C_EEPROM_ADDR, address,
+		     CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
+		goto err;
+	address = 0x800 + (int) value; /* Address of NET CONFIG structure. */
+	address += 12; /* Address of NET INTERFACE CONFIG structure. */
+
+	/* Read NET INTERFACE CONFIG 2 structure offset. */
+	if (i2c_read(CFG_I2C_EEPROM_ADDR, address,
+		     CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
+		goto err;
+	address = 0x800 + 16 + (int) value;	/* Address of NET INTERFACE
+						 * CONFIG 2 structure. */
+
+	/* Read MAC address. */
+	if (i2c_read(CFG_I2C_EEPROM_ADDR, address,
+		     CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &mac[0], 8))
+		goto err;
+
+	buf[0] = mac[0] >> 24;
+	buf[1] = mac[0] >> 16;
+	buf[2] = mac[0] >> 8;
+	buf[3] = mac[0];
+	buf[4] = mac[1] >> 24;
+	buf[5] = mac[1] >> 16;
+
+	return 0;
+
+err:
+	printf("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR);
+	return 1;
+}
+
+/* Platform dependent initialisation. */
+int misc_init_r(void)
+{
+	int i;
+	u_int8_t i2cbuf;
+	u_int8_t env_enetaddr[6], eeprom_enetaddr[6];
+	char *tmp = getenv("ethaddr");
+	char *end;
+	int clk;
+
+	/* EMIF-A CS3 configuration for FPGA. */
+	REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL;
+
+	clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
+
+	printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2);
+	printf("DDR Clock: %dMHz\n", (clk / 2));
+
+	/* Configure I2C switch (PCA9543) to enable channel 0. */
+	i2cbuf = CFG_I2C_PCA9543_ENABLE_CH0;
+	if (i2c_write(CFG_I2C_PCA9543_ADDR, 0,
+		      CFG_I2C_PCA9543_ADDR_LEN, &i2cbuf, 1)) {
+		printf("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR);
+		return 1;
+	}
+
+	/* Read Ethernet MAC address from the U-Boot environment. */
+	for (i = 0; i < 6; i++) {
+		env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
+		if (tmp)
+			tmp = (*end) ? end+1 : end;
+	}
+
+	/* Read Ethernet MAC address from EEPROM. */
+	if (read_mac_address(eeprom_enetaddr) == 0) {
+		if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 &&
+		    memcmp(env_enetaddr, eeprom_enetaddr, 6) != 0) {
+			printf("\nWarning: MAC addresses don't match:\n");
+			printf("\tHW MAC address:  "
+			       "%02X:%02X:%02X:%02X:%02X:%02X\n",
+			       eeprom_enetaddr[0], eeprom_enetaddr[1],
+			       eeprom_enetaddr[2], eeprom_enetaddr[3],
+			       eeprom_enetaddr[4], eeprom_enetaddr[5]);
+			printf("\t\"ethaddr\" value: "
+			       "%02X:%02X:%02X:%02X:%02X:%02X\n",
+			       env_enetaddr[0], env_enetaddr[1],
+			       env_enetaddr[2], env_enetaddr[3],
+			       env_enetaddr[4], env_enetaddr[5]) ;
+			debug("### Set MAC addr from environment\n");
+			memcpy(eeprom_enetaddr, env_enetaddr, 6);
+		}
+		if (!tmp) {
+			char ethaddr[20];
+
+			sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
+				eeprom_enetaddr[0], eeprom_enetaddr[1],
+				eeprom_enetaddr[2], eeprom_enetaddr[3],
+				eeprom_enetaddr[4], eeprom_enetaddr[5]) ;
+			debug("### Set environment from HW MAC addr = \"%s\"\n",
+			      ethaddr);
+			setenv("ethaddr", ethaddr);
+		}
+	}
+
+	if (!eth_hw_init()) {
+		printf("Ethernet init failed\n");
+	} else {
+		printf("ETH PHY: %s\n", phy.name);
+	}
+
+	/* On this platform, U-Boot is copied in RAM by the UBL,
+	 * so we are always in the relocated state. */
+	gd->flags |= GD_FLG_RELOC;
+
+	return(0);
+}
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return(0);
+}
diff --git a/board/freescale/mpc8260ads/mpc8260ads.c b/board/freescale/mpc8260ads/mpc8260ads.c
index 6f683f0..8ab7d35 100644
--- a/board/freescale/mpc8260ads/mpc8260ads.c
+++ b/board/freescale/mpc8260ads/mpc8260ads.c
@@ -46,6 +46,10 @@
 #ifdef CONFIG_PCI
 #include <pci.h>
 #endif
+#ifdef CONFIG_OF_LIBFDT
+#include <libfdt.h>
+#include <fdt_support.h>
+#endif
 
 /*
  * I/O Port configuration table
@@ -544,3 +548,26 @@ void pci_init_board(void)
 	pci_mpc8250_init(&hose);
 }
 #endif
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_blob_update(void *blob, bd_t *bd)
+{
+	int ret;
+
+	ret = fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
+
+	if (ret < 0) {
+		printf("ft_blob_update(): cannot set /memory/reg "
+			"property err:%s\n", fdt_strerror(ret));
+	}
+}
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+#ifdef CONFIG_PCI
+	ft_pci_setup(blob, bd);
+#endif
+	ft_blob_update(blob, bd);
+}
+#endif
diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c
index 8ec4cd7..44fc79c 100644
--- a/board/ids8247/ids8247.c
+++ b/board/ids8247/ids8247.c
@@ -334,7 +334,7 @@ void ft_blob_update(void *blob, bd_t *bd)
 	ret = fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 
 	if (ret < 0) {
-		printf("ft_blob_update): cannot set /memory/reg "
+		printf("ft_blob_update(): cannot set /memory/reg "
 			"property err:%s\n", fdt_strerror(ret));
 	}
 }
diff --git a/board/mgcoge/mgcoge.c b/board/mgcoge/mgcoge.c
index 89ced1e..51b6dc6 100644
--- a/board/mgcoge/mgcoge.c
+++ b/board/mgcoge/mgcoge.c
@@ -307,7 +307,7 @@ void ft_blob_update(void *blob, bd_t *bd)
 		ret = fdt_setprop(blob, nodeoffset, "reg", memory_data,
 					sizeof(memory_data));
 	if (ret < 0)
-		printf("ft_blob_update): cannot set /memory/reg "
+		printf("ft_blob_update(): cannot set /memory/reg "
 			"property err:%s\n", fdt_strerror(ret));
 	}
 	else {
@@ -327,7 +327,7 @@ void ft_blob_update(void *blob, bd_t *bd)
 		ret = fdt_setprop(blob, nodeoffset, "ranges", flash_data,
 					sizeof(flash_data));
 	if (ret < 0)
-		printf("ft_blob_update): cannot set /localbus/ranges "
+		printf("ft_blob_update(): cannot set /localbus/ranges "
 			"property err:%s\n", fdt_strerror(ret));
 	}
 	else {
@@ -341,7 +341,7 @@ void ft_blob_update(void *blob, bd_t *bd)
 		ret = fdt_setprop(blob, nodeoffset, "mac-address", bd->bi_enetaddr,
 					sizeof(uchar) * 6);
 	if (ret < 0)
-		printf("ft_blob_update): cannot set /soc/cpm/ethernet/mac-address "
+		printf("ft_blob_update(): cannot set /soc/cpm/ethernet/mac-address "
 			"property err:%s\n", fdt_strerror(ret));
 	}
 	else {
diff --git a/board/mgsuvd/mgsuvd.c b/board/mgsuvd/mgsuvd.c
index d81cafb..c51ea7e 100644
--- a/board/mgsuvd/mgsuvd.c
+++ b/board/mgsuvd/mgsuvd.c
@@ -164,7 +164,7 @@ void ft_blob_update(void *blob, bd_t *bd)
 			ret = fdt_setprop(blob, nodeoffset, "reg", memory_data,
 						sizeof(memory_data));
 		if (ret < 0)
-			printf("ft_blob_update): cannot set /memory/reg "
+			printf("ft_blob_update(): cannot set /memory/reg "
 				"property err:%s\n", fdt_strerror(ret));
 		}
 		else {
@@ -180,7 +180,7 @@ void ft_blob_update(void *blob, bd_t *bd)
 		ret = fdt_setprop(blob, nodeoffset, "ranges", flash_data,
 					sizeof(flash_data));
 	if (ret < 0)
-		printf("ft_blob_update): cannot set /localbus/ranges "
+		printf("ft_blob_update(): cannot set /localbus/ranges "
 			"property err:%s\n", fdt_strerror(ret));
 	}
 	else {
@@ -195,7 +195,7 @@ void ft_blob_update(void *blob, bd_t *bd)
 		ret = fdt_setprop(blob, nodeoffset, "brg-frequency", brg_data,
 					sizeof(brg_data));
 	if (ret < 0)
-		printf("ft_blob_update): cannot set /soc/cpm/brg-frequency "
+		printf("ft_blob_update(): cannot set /soc/cpm/brg-frequency "
 			"property err:%s\n", fdt_strerror(ret));
 	}
 	else {
@@ -209,7 +209,7 @@ void ft_blob_update(void *blob, bd_t *bd)
 		ret = fdt_setprop(blob, nodeoffset, "mac-address", bd->bi_enetaddr,
 					sizeof(uchar) * 6);
 	if (ret < 0)
-		printf("ft_blob_update): cannot set /soc/cpm/scc/mac-address "
+		printf("ft_blob_update(): cannot set /soc/cpm/scc/mac-address "
 			"property err:%s\n", fdt_strerror(ret));
 	}
 	else {
diff --git a/board/mpr2/Makefile b/board/mpr2/Makefile
index 080476b..9f8fb80 100644
--- a/board/mpr2/Makefile
+++ b/board/mpr2/Makefile
@@ -32,7 +32,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-OBJS	:= mpr2.o
+COBJS	:= mpr2.o
 SOBJS	:= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/ms7720se/Makefile b/board/ms7720se/Makefile
index 545889f..18745ec 100644
--- a/board/ms7720se/Makefile
+++ b/board/ms7720se/Makefile
@@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-OBJS	:= ms7720se.o
+COBJS	:= ms7720se.o
 SOBJS	:= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/ms7720se/ms7720se.c b/board/ms7720se/ms7720se.c
index ad76c0b..af62cdf 100644
--- a/board/ms7720se/ms7720se.c
+++ b/board/ms7720se/ms7720se.c
@@ -40,7 +40,6 @@ int checkboard(void)
 
 int board_init(void)
 {
-
 	return 0;
 }
 
diff --git a/board/ms7722se/Makefile b/board/ms7722se/Makefile
index 744744e..b203b6d 100644
--- a/board/ms7722se/Makefile
+++ b/board/ms7722se/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-OBJS	:= ms7722se.o
+COBJS	:= ms7722se.o
 SOBJS	:= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/ms7722se/ms7722se.c b/board/ms7722se/ms7722se.c
index 0d3d55c..cf02242 100644
--- a/board/ms7722se/ms7722se.c
+++ b/board/ms7722se/ms7722se.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2007
+ * Copyright (C) 2007,2008
  * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
  *
  * Copyright (C) 2007
@@ -43,7 +43,7 @@ int board_init(void)
 	return 0;
 }
 
-int dram_init (void)
+int dram_init(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 
@@ -53,7 +53,7 @@ int dram_init (void)
 	return 0;
 }
 
-void led_set_state (unsigned short value)
+void led_set_state(unsigned short value)
 {
-	*((volatile unsigned short *) LED_BASE) = (value & 0xFF);
+	writew(value & 0xFF, LED_BASE);
 }
diff --git a/board/ms7750se/Makefile b/board/ms7750se/Makefile
index d806101..01ddf69 100644
--- a/board/ms7750se/Makefile
+++ b/board/ms7750se/Makefile
@@ -21,7 +21,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-OBJS	:= ms7750se.o
+COBJS	:= ms7750se.o
 SOBJS	:= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/r2dplus/Makefile b/board/r2dplus/Makefile
index 8529857..e96a8aa 100644
--- a/board/r2dplus/Makefile
+++ b/board/r2dplus/Makefile
@@ -21,7 +21,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-OBJS	:= r2dplus.o
+COBJS	:= r2dplus.o
 SOBJS	:= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/r2dplus/r2dplus.c b/board/r2dplus/r2dplus.c
index 2ee3ea2..8fb8ff6 100644
--- a/board/r2dplus/r2dplus.c
+++ b/board/r2dplus/r2dplus.c
@@ -24,6 +24,7 @@
 #include <common.h>
 #include <ide.h>
 #include <asm/processor.h>
+#include <asm/io.h>
 #include <asm/pci.h>
 
 int checkboard(void)
@@ -37,7 +38,7 @@ int board_init(void)
 	return 0;
 }
 
-int dram_init (void)
+int dram_init(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 
@@ -52,25 +53,26 @@ int board_late_init(void)
 	return 0;
 }
 
-#define FPGA_BASE          0xA4000000
-#define FPGA_CFCTL         (FPGA_BASE + 0x04)
-#define FPGA_CFPOW         (FPGA_BASE + 0x06)
-#define FPGA_CFCDINTCLR    (FPGA_BASE + 0x2A)
+#define FPGA_BASE		0xA4000000
+#define FPGA_CFCTL		(FPGA_BASE + 0x04)
+#define CFCTL_EN		(0x432)
+#define FPGA_CFPOW		(FPGA_BASE + 0x06)
+#define CFPOW_ON		(0x02)
+#define FPGA_CFCDINTCLR	(FPGA_BASE + 0x2A)
+#define CFCDINTCLR_EN	(0x01)
 
-void ide_set_reset (int idereset)
+void ide_set_reset(int idereset)
 {
 	/* if reset = 1 IDE reset will be asserted */
-	if (idereset){
-		(*(vu_short *)FPGA_CFCTL) = 0x432;
-		(*(vu_short *)FPGA_CFPOW) |= 0x02;
-		(*(vu_short *)FPGA_CFCDINTCLR) = 0x01;
+	if (idereset) {
+		outw(CFCTL_EN, FPGA_CFCTL);	/* CF enable */
+		outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */
+		outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */
 	}
 }
 
-#if defined(CONFIG_PCI)
 static struct pci_controller hose;
 void pci_init_board(void)
 {
-	pci_sh7751_init( &hose );
+	pci_sh7751_init(&hose);
 }
-#endif /* CONFIG_PCI */
diff --git a/board/r7780mp/Makefile b/board/r7780mp/Makefile
index 0ab6d1d..c100e7e 100644
--- a/board/r7780mp/Makefile
+++ b/board/r7780mp/Makefile
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-OBJS	:= r7780mp.o
+COBJS	:= r7780mp.o
 SOBJS	:= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/r7780mp/r7780mp.c b/board/r7780mp/r7780mp.c
index 1a37711..19c35d3 100644
--- a/board/r7780mp/r7780mp.c
+++ b/board/r7780mp/r7780mp.c
@@ -38,12 +38,12 @@ int checkboard(void)
 int board_init(void)
 {
 	/* SCIF Enable */
-	*(vu_short*)PHCR = 0x0000;
+	writew(0x0, PHCR);
 
 	return 0;
 }
 
-int dram_init (void)
+int dram_init(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 
@@ -53,29 +53,27 @@ int dram_init (void)
 	return 0;
 }
 
-void led_set_state (unsigned short value)
+void led_set_state(unsigned short value)
 {
 
 }
 
-void ide_set_reset (int idereset)
+void ide_set_reset(int idereset)
 {
 	/* if reset = 1 IDE reset will be asserted */
-	if (idereset){
-		(*(vu_short *)FPGA_CFCTL) = 0x432;
+	if (idereset) {
+		writew(0x432, FPGA_CFCTL);
 #if defined(CONFIG_R7780MP)
-		(*(vu_short *)FPGA_CFPOW) |= 0x01;
+		writew(inw(FPGA_CFPOW)|0x01, FPGA_CFPOW);
 #else
-		(*(vu_short *)FPGA_CFPOW) |= 0x02;
+		writew(inw(FPGA_CFPOW)|0x02, FPGA_CFPOW);
 #endif
-		(*(vu_short *)FPGA_CFCDINTCLR) = 0x01;
+		writew(0x01, FPGA_CFCDINTCLR);
 	}
 }
 
-#if defined(CONFIG_PCI)
 static struct pci_controller hose;
 void pci_init_board(void)
 {
-	pci_sh7780_init( &hose );
+	pci_sh7780_init(&hose);
 }
-#endif
diff --git a/board/sh7763rdp/Makefile b/board/sh7763rdp/Makefile
index 8a04477..62a683d 100644
--- a/board/sh7763rdp/Makefile
+++ b/board/sh7763rdp/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-OBJS	:= sh7763rdp.o
+COBJS	:= sh7763rdp.o
 SOBJS	:= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/sh7763rdp/sh7763rdp.c b/board/sh7763rdp/sh7763rdp.c
index 6f9501b..92ac7b7 100644
--- a/board/sh7763rdp/sh7763rdp.c
+++ b/board/sh7763rdp/sh7763rdp.c
@@ -49,19 +49,20 @@ int board_init(void)
 {
 	vu_short dat;
 
-	*(vu_short *)(CPU_CMDREG) |= 0x0001;
+	/* Enable mode */
+	writew(inw(CPU_CMDREG)|0x0001, CPU_CMDREG);
 
 	/* GPIO Setting (eth1) */
-	dat = *(vu_short *)(PSEL1);
-	*(vu_short *)PSEL1 = ((dat & ~0xff00) | 0x2400);
-	*(vu_short *)PFCR = 0;
-	*(vu_short *)PGCR = 0;
-	*(vu_short *)PHCR = 0;
+	dat = inw(PSEL1);
+	writew(((dat & ~0xff00) | 0x2400), PSEL1);
+	writew(0, PFCR);
+	writew(0, PGCR);
+	writew(0, PHCR);
 
 	return 0;
 }
 
-int dram_init (void)
+int dram_init(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 
@@ -71,6 +72,6 @@ int dram_init (void)
 	return 0;
 }
 
-void led_set_state (unsigned short value)
+void led_set_state(unsigned short value)
 {
 }