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authorTom Rini <trini@konsulko.com>2016-09-20 01:55:34 (GMT)
committerTom Rini <trini@konsulko.com>2016-09-20 13:30:25 (GMT)
commitadf32adb706760b1c527d0d4d6b4976b36f19338 (patch)
treee5cde6d5f66b5dd1521568f59a0a51a8b1bf19a4 /board
parenta4d88920e5d0b67a92f8041f5e0fac0ce027bb48 (diff)
downloadu-boot-adf32adb706760b1c527d0d4d6b4976b36f19338.tar.xz
PowerPC: Update MIP405/MIP405T to use Kconfig better
Convert CONFIG_MIP405T from SYS_EXTRA_OPTIONS to a real config There are two boards, MIP405 and MIP405T that have a few differences. Start by checking for CONFIG_TARGET_MIP405. Then introduce CONFIG_TARGET_MIP405T and use that not CONFIG_MIP405T. Next, convert also convert the usage of CONFIG_ISO_STRING to be based on Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board')
-rw-r--r--board/mpl/common/common_util.c16
-rw-r--r--board/mpl/common/common_util.h2
-rw-r--r--board/mpl/common/pci_parts.h4
-rw-r--r--board/mpl/mip405/Kconfig7
-rw-r--r--board/mpl/mip405/mip405.c14
-rw-r--r--board/mpl/pati/pati.h2
6 files changed, 24 insertions, 21 deletions
diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c
index 2262175..3c110fa 100644
--- a/board/mpl/common/common_util.c
+++ b/board/mpl/common/common_util.c
@@ -20,7 +20,7 @@
#include "../pip405/pip405.h"
#include <asm/4xx_pci.h>
#endif
-#ifdef CONFIG_MIP405
+#if defined(CONFIG_TARGET_MIP405) || defined(CONFIG_TARGET_MIP405T)
#include "../mip405/mip405.h"
#include <asm/4xx_pci.h>
#endif
@@ -36,7 +36,8 @@ extern int mem_test(ulong start, ulong ramsize, int quiet);
#define I2C_BACKUP_ADDR 0x7C00 /* 0x200 bytes for backup */
#define IMAGE_SIZE CONFIG_SYS_MONITOR_LEN /* ugly, but it works for now */
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
+#if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \
+ || defined(CONFIG_TARGET_MIP405T)
/*-----------------------------------------------------------------------
* On PIP/MIP405 we have 3 (4) possible boot mode
*
@@ -116,7 +117,7 @@ void setup_cs_reloc(void)
mtdcr(EBC0_CFGDATA, FLASH_CR_B);
}
}
-#endif /* #if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) */
+#endif /* #if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) */
#ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
/* adjust flash start and protection info */
@@ -190,12 +191,11 @@ mpl_prg(uchar *src, ulong size)
#if defined(CONFIG_PATI)
int start_sect;
#endif
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) || defined(CONFIG_PATI)
+#if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \
+ || defined(CONFIG_TARGET_MIP405T) || defined(CONFIG_PATI)
char *copystr = (char *)src;
ulong *magic = (ulong *)src;
-#endif
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) || defined(CONFIG_PATI)
if (uimage_to_cpu (magic[0]) != IH_MAGIC) {
puts("Bad Magic number\n");
return -1;
@@ -241,7 +241,7 @@ mpl_prg(uchar *src, ulong size)
return (1);
}
-#else /* #if !defined(CONFIG_PATI */
+#else /* #if !defined(CONFIG_PATI) */
start = FIRM_START;
start_sect = -1;
@@ -701,7 +701,7 @@ void video_get_info_str (int line_number, char *info)
strcpy(buf,"### No HW ID - assuming PIP405");
}
#endif
-#ifdef CONFIG_MIP405
+#if defined(CONFIG_TARGET_MIP405) || defined(CONFIG_TARGET_MIP405T)
if (!s || strncmp (s, "MIP405", 6)) {
strcpy(buf,"### No HW ID - assuming MIP405");
}
diff --git a/board/mpl/common/common_util.h b/board/mpl/common/common_util.h
index e81ee35..22f5c2e 100644
--- a/board/mpl/common/common_util.h
+++ b/board/mpl/common/common_util.h
@@ -17,12 +17,10 @@ extern flash_info_t flash_info[]; /* info for FLASH chips */
void get_backup_values(backup_t *buf);
-#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
#define BOOT_MPS 0x01
#define BOOT_PCI 0x02
int get_boot_mode(void);
void setup_cs_reloc(void);
-#endif
void check_env(void);
#if defined(CONFIG_CMD_DOC)
diff --git a/board/mpl/common/pci_parts.h b/board/mpl/common/pci_parts.h
index 4193e92..75e8cae 100644
--- a/board/mpl/common/pci_parts.h
+++ b/board/mpl/common/pci_parts.h
@@ -91,7 +91,7 @@ static struct pci_pip405_config_entry piix4_isa_bridge_f0[] = {
static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {
{PCI_CFG_PIIX4_BMIBA, 0x0001000, 4}, /* set BMI to a valid address */
{PCI_COMMAND, 0x0001, 2}, /* enable IO access */
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
{PCI_CFG_PIIX4_IDETIM, 0x80008000, 4}, /* enable Both IDE channels */
#else
{PCI_CFG_PIIX4_IDETIM, 0x00008000, 4}, /* enable IDE channel0 */
@@ -101,7 +101,7 @@ static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {
/* PIIX4 USB Controller Function 2 */
static struct pci_pip405_config_entry piix4_usb_cntrl_f2[] = {
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
{PCI_INTERRUPT_LINE, 31, 1}, /* Int vector = 31 */
{PCI_BASE_ADDRESS_4, 0x0000E001, 4}, /* Set IO Address to 0xe000 to 0xe01F */
{PCI_LATENCY_TIMER, 0x80, 1}, /* Latency Timer 0x80 */
diff --git a/board/mpl/mip405/Kconfig b/board/mpl/mip405/Kconfig
index 48ba91a..e003a43 100644
--- a/board/mpl/mip405/Kconfig
+++ b/board/mpl/mip405/Kconfig
@@ -1,4 +1,4 @@
-if TARGET_MIP405
+if TARGET_MIP405 || TARGET_MIP405T
config SYS_BOARD
default "mip405"
@@ -9,4 +9,9 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "MIP405"
+config ISO_STRING
+ string
+ default "MEV-10082-001" if TARGET_MIP405T
+ default "MEV-10072-001" if TARGET_MIP405
+
endif
diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c
index 4a0d696..8b9892b 100644
--- a/board/mpl/mip405/mip405.c
+++ b/board/mpl/mip405/mip405.c
@@ -92,7 +92,7 @@ typedef struct {
unsigned char sz; /* log binary => Size = (4MByte<<sz) 5 = 128, 4 = 64, 3 = 32, 2 = 16, 1=8 */
unsigned char ecc; /* if true, ecc is enabled */
} sdram_t;
-#if defined(CONFIG_MIP405T)
+#if defined(CONFIG_TARGET_MIP405T)
const sdram_t sdram_table[] = {
{ 0x0F, /* MIP405T Rev A, 64MByte -1 Board */
3, /* Case Latenty = 3 */
@@ -168,7 +168,7 @@ const sdram_t sdram_table[] = {
0xff,
0xff }
};
-#endif /*CONFIG_MIP405T */
+#endif /*CONFIG_TARGET_MIP405T */
void SDRAM_err (const char *s)
{
#ifndef SDRAM_DEBUG
@@ -262,7 +262,7 @@ int init_sdram (void)
#endif
/* check board */
bc = in8 (PLD_PART_REG);
-#if defined(CONFIG_MIP405T)
+#if defined(CONFIG_TARGET_MIP405T)
if((bc & 0x80)==0)
SDRAM_err ("U-Boot configured for a MIP405T not for a MIP405!!!\n");
#else
@@ -543,7 +543,7 @@ void ide_set_reset (int idereset)
void get_pcbrev_var(unsigned char *pcbrev, unsigned char *var)
{
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
unsigned char bc,rc,tmp;
int i;
@@ -575,7 +575,7 @@ void get_pcbrev_var(unsigned char *pcbrev, unsigned char *var)
* Check Board Identity:
*/
/* serial String: "MIP405_1000" OR "MIP405T_1000" */
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
#define BOARD_NAME "MIP405"
#else
#define BOARD_NAME "MIP405T"
@@ -777,7 +777,7 @@ void print_mip405_info (void)
(cfg >> 1) & 0x1, (cfg >> 2) & 0x1, (cfg >> 3) & 0x1);
printf ("User LED %s\n", (com_mode & 0x4) ? "on" : "off");
printf ("UART Clocks %d\n", (com_mode >> 4) & 0x3);
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
printf ("User Config Switch %d %d %d %d %d %d %d %d\n",
(ext) & 0x1, (ext >> 1) & 0x1, (ext >> 2) & 0x1,
(ext >> 3) & 0x1, (ext >> 4) & 0x1, (ext >> 5) & 0x1,
@@ -793,7 +793,7 @@ void print_mip405_info (void)
printf ("IDE Reset %s\n", (ext & 0x01) ? "asserted" : "not asserted");
printf ("IRQs:\n");
printf (" PIIX INTR: %s\n", (irq_reg & 0x80) ? "inactive" : "active");
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
printf (" UART0 IRQ: %s\n", (irq_reg & 0x40) ? "inactive" : "active");
printf (" UART1 IRQ: %s\n", (irq_reg & 0x20) ? "inactive" : "active");
#endif
diff --git a/board/mpl/pati/pati.h b/board/mpl/pati/pati.h
index 2600bba..2938056 100644
--- a/board/mpl/pati/pati.h
+++ b/board/mpl/pati/pati.h
@@ -201,7 +201,7 @@
#define PCI_VENDOR_ID_MPL 0x18E6
#define PCI_DEVICE_ID_PATI 0x00DA
-#if defined(CONFIG_MIP405)
+#if defined(CONFIG_TARGET_MIP405) || defined(CONFIG_TARGET_MIP405T)
#define PATI_FIRMWARE_START_OFFSET 0x00300000
#define PATI_ISO_STRING "MEV-10084-001"
#endif