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author | Stefan Roese <sr@denx.de> | 2009-09-24 12:10:30 (GMT) |
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committer | Stefan Roese <sr@denx.de> | 2009-09-28 08:46:05 (GMT) |
commit | b306db2f1bf561b5823a655c677fe28cfad80cfb (patch) | |
tree | 8a20bc22a8defaaed048009372119f13fb93ccfa /board | |
parent | 95b602bab5fec2fffab07a01ea3947c70d1bacc1 (diff) | |
download | u-boot-b306db2f1bf561b5823a655c677fe28cfad80cfb.tar.xz |
ppc4xx: Remove mtsdram0() marcos and use common mtsdram() instead
Additionally some whitespace coding style fixes.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board')
-rw-r--r-- | board/g2000/g2000.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/board/g2000/g2000.c b/board/g2000/g2000.c index 092a3d8..03cd6b8 100644 --- a/board/g2000/g2000.c +++ b/board/g2000/g2000.c @@ -114,18 +114,17 @@ int checkboard (void) long int init_sdram_static_settings(void) { -#define mtsdram0(reg, data) mtdcr(SDRAM0_CFGADDR,reg);mtdcr(SDRAM0_CFGDATA,data) /* disable memcontroller so updates work */ - mtsdram0( SDRAM0_CFG, MEM_MCOPT1_INIT_VAL ); - mtsdram0( SDRAM0_RTR , MEM_RTR_INIT_VAL ); - mtsdram0( SDRAM0_PMIT , MEM_PMIT_INIT_VAL ); - mtsdram0( SDRAM0_B0CR , MEM_MB0CF_INIT_VAL ); - mtsdram0( SDRAM0_B1CR , MEM_MB1CF_INIT_VAL ); - mtsdram0( SDRAM0_TR , MEM_SDTR1_INIT_VAL ); + mtsdram(SDRAM0_CFG, MEM_MCOPT1_INIT_VAL); + mtsdram(SDRAM0_RTR, MEM_RTR_INIT_VAL); + mtsdram(SDRAM0_PMIT, MEM_PMIT_INIT_VAL); + mtsdram(SDRAM0_B0CR, MEM_MB0CF_INIT_VAL); + mtsdram(SDRAM0_B1CR, MEM_MB1CF_INIT_VAL); + mtsdram(SDRAM0_TR, MEM_SDTR1_INIT_VAL); /* SDRAM have a power on delay, 500 micro should do */ udelay(500); - mtsdram0( SDRAM0_CFG, MEM_MCOPT1_INIT_VAL|SDRAM0_CFG_ENABLE ); + mtsdram(SDRAM0_CFG, MEM_MCOPT1_INIT_VAL|SDRAM0_CFG_ENABLE); return (CONFIG_SYS_SDRAM_SIZE); /* CONFIG_SYS_SDRAM_SIZE is in G2000.h */ } |