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authorYork Sun <yorksun at freescale.com>2015-05-28 09:24:09 (GMT)
committerYork Sun <yorksun@freescale.com>2015-07-20 18:44:35 (GMT)
commitfc7b3855e1c285e59487699d898f4415a8f62c05 (patch)
tree5bac1e8fa4d3570beba1815d6eb03e79bbf40b4b /board
parentb92557cd3f37538fbd813e72f447109cbde4ff87 (diff)
downloadu-boot-fc7b3855e1c285e59487699d898f4415a8f62c05.tar.xz
armv8/ls2085ardb: Fix SPD address error on early boards
Board rev C and earlier has duplicated SPD address on 2nd DDR controller slots. It is fixed on rev D and later. SPD addresses need to be updated accordingly. Signed-off-by: York Sun <yorksun at freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/ls2085ardb/ls2085ardb.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/board/freescale/ls2085ardb/ls2085ardb.c b/board/freescale/ls2085ardb/ls2085ardb.c
index 5f25328..abe2114 100644
--- a/board/freescale/ls2085ardb/ls2085ardb.c
+++ b/board/freescale/ls2085ardb/ls2085ardb.c
@@ -273,3 +273,22 @@ void qixis_dump_switch(void)
printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1]));
}
}
+
+/*
+ * Board rev C and earlier has duplicated I2C addresses for 2nd controller.
+ * Both slots has 0x54, resulting 2nd slot unusable.
+ */
+void update_spd_address(unsigned int ctrl_num,
+ unsigned int slot,
+ unsigned int *addr)
+{
+ u8 sw;
+
+ sw = QIXIS_READ(arch);
+ if ((sw & 0xf) < 0x3) {
+ if (ctrl_num == 1 && slot == 0)
+ *addr = SPD_EEPROM_ADDRESS4;
+ else if (ctrl_num == 1 && slot == 1)
+ *addr = SPD_EEPROM_ADDRESS3;
+ }
+}