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author | Tom Rini <trini@konsulko.com> | 2015-11-17 22:57:32 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2015-11-17 22:57:32 (GMT) |
commit | fe524569d4a7eea66475d5815be75660e59b6ee4 (patch) | |
tree | b9c9c5db567947ea5415a33a5190034177853677 /board | |
parent | fb2dea60e8f355ae00d427db09112a90839c96ec (diff) | |
parent | 6a26748c5e5558073b72ff55de4dc3ea245d3726 (diff) | |
download | u-boot-fe524569d4a7eea66475d5815be75660e59b6ee4.tar.xz |
Merge git://git.denx.de/u-boot-marvell
Diffstat (limited to 'board')
-rw-r--r-- | board/Marvell/db-88f6820-gp/db-88f6820-gp.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c index 84ca55c..e700781 100644 --- a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c +++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c @@ -13,6 +13,7 @@ #include <asm/arch/soc.h> #include "../drivers/ddr/marvell/a38x/ddr3_a38x_topology.h" +#include <../serdes/a38x/high_speed_env_spec.h> DECLARE_GLOBAL_DATA_PTR; @@ -55,6 +56,22 @@ static struct marvell_io_exp io_exp[] = { { 0x21, 3, 0xC0 } /* Output Data, register#1 */ }; +static struct serdes_map board_serdes_map[] = { + {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, + {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {SATA3, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {SATA2, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0} +}; + +int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) +{ + *serdes_map_array = board_serdes_map; + *count = ARRAY_SIZE(board_serdes_map); + return 0; +} + /* * Define the DDR layout / topology here in the board file. This will * be used by the DDR3 init code in the SPL U-Boot version to configure |