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authorShengzhou Liu <Shengzhou.Liu@nxp.com>2016-11-21 03:36:48 (GMT)
committerYork Sun <york.sun@nxp.com>2016-12-05 16:31:45 (GMT)
commit02fb2761576be8096ebf1b3f961a2cdb21b422ae (patch)
tree70cd556e7498ef63f2d51519958cfc2994c73950 /board
parent5a17b8b5dab8973089b7400d05f8503d56f29370 (diff)
downloadu-boot-02fb2761576be8096ebf1b3f961a2cdb21b422ae.tar.xz
fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum
- add additional function erratum_a009942_check_cpo to check if the board needs tuning CPO calibration for optimal setting. - move ERRATUM_A009942(with revision to check cpo_sample option) from fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts. - move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c - remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> [YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500] Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/ls1021aqds/ls1021aqds.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 4eb38a7..79078d2 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -22,7 +22,7 @@
#include <spl.h>
#include <fsl_devdis.h>
#include <fsl_validate.h>
-
+#include <fsl_ddr.h>
#include "../common/sleep.h"
#include "../common/qixis.h"
#include "ls1021aqds_qixis.h"
@@ -433,7 +433,9 @@ int board_init(void)
#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
erratum_a010315();
#endif
-
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009942
+ erratum_a009942_check_cpo();
+#endif
major = get_soc_major_rev();
if (major == SOC_MAJOR_VER_1_0) {
/* Set CCI-400 control override register to