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author | Yuan Yao <yao.yuan@nxp.com> | 2016-06-08 10:24:57 (GMT) |
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committer | York Sun <york.sun@nxp.com> | 2016-06-10 20:45:00 (GMT) |
commit | 453418f2d2df33f370754582b7e21d2513e2ee28 (patch) | |
tree | eaabfae1d46c54df5b1ba7b402c2e77807c4e164 /board | |
parent | 95ab851de0de317e07a843d23bfaeb89d94575f8 (diff) | |
download | u-boot-453418f2d2df33f370754582b7e21d2513e2ee28.tar.xz |
armv8: ls2080aqds: Config QSPI pin mux via FPGA in NAND boot
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/ls2080aqds/ls2080aqds.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index a07cd0a..694b28b 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -208,6 +208,15 @@ int board_init(void) else config_board_mux(MUX_TYPE_SDHC); +#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI) + val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4); + + if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3)) + QIXIS_WRITE(brdcfg[9], + (QIXIS_READ(brdcfg[9]) & 0xf8) | + FSL_QIXIS_BRDCFG9_QSPI); +#endif + #ifdef CONFIG_ENV_IS_NOWHERE gd->env_addr = (ulong)&default_environment[0]; #endif |