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| author | Icenowy Zheng <icenowy@aosc.io> | 2017-08-14 15:00:11 (GMT) |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-10-03 17:12:06 (GMT) |
| commit | d4aac530c6ab7d63d362e2836ffa244a91f1765a (patch) | |
| tree | 5f7a7a46f067988f6addbfeead7dd61e97ac9732 /board | |
| parent | 818b2933055a2d444f43d94e2a7ffce0082fc56b (diff) | |
| download | u-boot-d4aac530c6ab7d63d362e2836ffa244a91f1765a.tar.xz | |
sunxi: defaultly enable SPL for Lichee Pi Zero
As we have already DRAM initialization code for V3s SoC, we can
defaultly enable SPL now on Lichee Pi Zero.
Add CONFIG_SPL in Lichee Pi Zero defconfig.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'board')
0 files changed, 0 insertions, 0 deletions