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| author | Keerthy <j-keerthy@ti.com> | 2017-06-02 09:30:31 (GMT) |
|---|---|---|
| committer | Jaehoon Chung <jh80.chung@samsung.com> | 2017-06-09 11:25:16 (GMT) |
| commit | fc69d472621b5c7513bcb8b4e1fe58ca8f5e035a (patch) | |
| tree | 756376f5f7faee007ddc06ed7aed6524eb31982b /board | |
| parent | e395b8848ac3a432faa70b4ba3bcbcbcc91ca555 (diff) | |
| download | u-boot-fc69d472621b5c7513bcb8b4e1fe58ca8f5e035a.tar.xz | |
board: ti: AM43XX: Add ddr voltage rail configuration
Add ddr voltage rail (dcdc3) configuration. Set the dcdc3
DDR supply to 1.35V.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/ti/am43xx/board.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index f44103d..a259028 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -421,6 +421,13 @@ void scale_vcores_generic(u32 m) printf("%s failure\n", __func__); return; } + + /* Set DCDC3 (DDR) voltage */ + if (tps65218_voltage_update(TPS65218_DCDC3, + TPS65218_DCDC3_VOLT_SEL_1350MV)) { + printf("%s failure\n", __func__); + return; + } } void scale_vcores_idk(u32 m) |