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| author | York Sun <yorksun@freescale.com> | 2014-10-27 18:45:11 (GMT) |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-12-05 16:06:08 (GMT) |
| commit | 1b2af9b4e23d396dca3eaa06fc9804659d22df0d (patch) | |
| tree | 807d8add7a8000ba4939bb68b1d1fcbfef8e490f /common/cmd_fdc.c | |
| parent | 14109c7a6aa9d9a30da85ad9e6bbd502ba125abc (diff) | |
| download | u-boot-1b2af9b4e23d396dca3eaa06fc9804659d22df0d.tar.xz | |
powerpc/t1040qds: Update DDR option
Enable interactive debugging by default. Remove DDR controller interleaving
because this SoC only has one controller. Use auto chip-select interleaving
to detect number of ranks.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Diffstat (limited to 'common/cmd_fdc.c')
0 files changed, 0 insertions, 0 deletions