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author | maxims@google.com <maxims@google.com> | 2017-01-30 19:35:04 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2017-02-08 20:56:30 (GMT) |
commit | d5ce3574619d6814ea095a798702e342d45203d4 (patch) | |
tree | 29505cad383e11e624d7fa6c94350344d29f3307 /configs/Sinlinx_SinA33_defconfig | |
parent | e163a931af34ba06d11b98707b69b8819e353257 (diff) | |
download | u-boot-d5ce3574619d6814ea095a798702e342d45203d4.tar.xz |
aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation
Fix H-PLL and M-PLL rate calculation in ast2500 clock driver.
Without this fix, valid setting can lead to division by zero
when requesting the rate of H-PLL or M-PLL clocks.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs/Sinlinx_SinA33_defconfig')
0 files changed, 0 insertions, 0 deletions