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authorJon Loeliger <jdl@freescale.com>2006-09-19 13:51:24 (GMT)
committerJon Loeliger <jdl@freescale.com>2006-09-19 13:51:24 (GMT)
commitafa98843e4665add11b69496341053b268156e3a (patch)
tree116878b6b94920a5f282d0a16e4b9ad9dfaf57ff /cpu/mcf52x2
parentb440d0ef72e6278973d3220c10136a4c0624c286 (diff)
parentaeec782b020930732eab075af97212c3f03afcae (diff)
downloadu-boot-afa98843e4665add11b69496341053b268156e3a.tar.xz
Merge branch 'master' of http://www.denx.de/git/u-boot
Conflicts: board/stxxtc/Makefile
Diffstat (limited to 'cpu/mcf52x2')
-rw-r--r--cpu/mcf52x2/Makefile18
-rw-r--r--cpu/mcf52x2/fec.c1
-rw-r--r--cpu/mcf52x2/start.S2
3 files changed, 14 insertions, 7 deletions
diff --git a/cpu/mcf52x2/Makefile b/cpu/mcf52x2/Makefile
index 879deb7..a05a803 100644
--- a/cpu/mcf52x2/Makefile
+++ b/cpu/mcf52x2/Makefile
@@ -1,5 +1,5 @@
#
-# (C) Copyright 2000-2004
+# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
@@ -25,21 +25,25 @@ include $(TOPDIR)/config.mk
# CFLAGS += -DET_DEBUG
-LIB = lib$(CPU).a
+LIB = $(obj)lib$(CPU).a
START =
-OBJS = serial.o interrupts.o cpu.o speed.o cpu_init.o fec.o
+COBJS = serial.o interrupts.o cpu.o speed.o cpu_init.o fec.o
-all: .depend $(START) $(LIB)
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+START := $(addprefix $(obj),$(START))
+
+all: $(obj).depend $(START) $(LIB)
$(LIB): $(OBJS)
$(AR) crv $@ $(OBJS)
#########################################################################
-.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
-sinclude .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/cpu/mcf52x2/fec.c b/cpu/mcf52x2/fec.c
index 6db6214..b6540b5 100644
--- a/cpu/mcf52x2/fec.c
+++ b/cpu/mcf52x2/fec.c
@@ -267,6 +267,7 @@ int eth_init (bd_t * bd)
fecp->fec_hash_table_high = 0;
fecp->fec_hash_table_low = 0;
#endif
+#endif
/* Set maximum receive buffer size.
*/
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index 8a83ca5..f1f4077 100644
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -140,6 +140,7 @@ _start:
move.l #(CFG_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
move.l %d0, 0x40000000
+#if defined(CONFIG_M5282)
/* Initialize RAMBAR1: locate SRAM and validate it */
move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
movec %d0, %RAMBAR1
@@ -171,6 +172,7 @@ _after_flashbar_copy:
#endif /* (TEXT_BASE == CFG_INT_FLASH_BASE) */
#endif
+#endif
/* if we come from a pre-loader we have no exception table and
* therefore no VBR to set
*/