diff options
author | Timur Tabi <timur@freescale.com> | 2010-03-29 17:51:07 (GMT) |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2010-03-30 15:50:22 (GMT) |
commit | 9ff32d8ccf0e23b5577c25610f001af8d761b4a2 (patch) | |
tree | 43cce2d1c3caf0a05fdbb33f6a44855f4965433f /cpu/mpc86xx | |
parent | 33f57bd553edf29dffef5a6c7d76e169c79a6049 (diff) | |
download | u-boot-9ff32d8ccf0e23b5577c25610f001af8d761b4a2.tar.xz |
mpc86xx: set the DDR BATs after calculating true DDR size
After determining how much DDR is actually in the system, set DBAT0 and
IBAT0 accordingly. This ensures that the CPU won't attempt to access
(via speculation) addresses outside of actual memory.
On 86xx systems, DBAT0 and IBAT0 (the BATs for DDR) are initialized to 2GB
and kept that way. If the system has less than 2GB of memory (typical for
an MPC8610 HPCD), the CPU may attempt to access this memory during
speculation. The zlib code is notorious for generating such memory reads,
and indeed on the MPC8610, uncompressing the Linux kernel causes a machine
check (without this patch).
Currently we are limited to power of two sized DDR since we only use a
single bat. If a non-power of two size is used that is less than
CONFIG_MAX_MEM_MAPPED u-boot will crash.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc86xx')
-rw-r--r-- | cpu/mpc86xx/cpu.c | 36 | ||||
-rw-r--r-- | cpu/mpc86xx/cpu_init.c | 4 |
2 files changed, 39 insertions, 1 deletions
diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index f7e012d..1887575 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -1,5 +1,5 @@ /* - * Copyright 2006,2009 Freescale Semiconductor, Inc. + * Copyright 2006,2009-2010 Freescale Semiconductor, Inc. * Jeff Brown * Srikanth Srinivasan (srikanth.srinivasan@freescale.com) * @@ -197,3 +197,37 @@ void mpc86xx_reginfo(void) printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", in_be32(&lbc->br7), in_be32(&lbc->or7)); } + +/* + * Set the DDR BATs to reflect the actual size of DDR. + * + * dram_size is the actual size of DDR, in bytes + * + * Note: we assume that CONFIG_MAX_MEM_MAPPED is 2G or smaller as we only + * are using a single BAT to cover DDR. + * + * If this is not true, (e.g. CONFIG_MAX_MEM_MAPPED is 2GB but HID0_XBSEN + * is not defined) then we might have a situation where U-Boot will attempt + * to relocated itself outside of the region mapped by DBAT0. + * This will cause a machine check. + * + * Currently we are limited to power of two sized DDR since we only use a + * single bat. If a non-power of two size is used that is less than + * CONFIG_MAX_MEM_MAPPED u-boot will crash. + * + */ +void setup_ddr_bat(phys_addr_t dram_size) +{ + unsigned long batu, bl; + + bl = TO_BATU_BL(min(dram_size, CONFIG_MAX_MEM_MAPPED)); + + if (BATU_SIZE(bl) != dram_size) { + u64 sz = (u64)dram_size - BATU_SIZE(bl); + print_size(sz, " left unmapped\n"); + } + + batu = bl | BATU_VS | BATU_VP; + write_bat(DBAT0, batu, CONFIG_SYS_DBAT0L); + write_bat(IBAT0, batu, CONFIG_SYS_IBAT0L); +} diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c index 5a78a9c..b4f047d 100644 --- a/cpu/mpc86xx/cpu_init.c +++ b/cpu/mpc86xx/cpu_init.c @@ -138,8 +138,12 @@ int cpu_init_r(void) /* Set up BAT registers */ void setup_bats(void) { +#if defined(CONFIG_SYS_DBAT0U) && defined(CONFIG_SYS_DBAT0L) write_bat(DBAT0, CONFIG_SYS_DBAT0U, CONFIG_SYS_DBAT0L); +#endif +#if defined(CONFIG_SYS_IBAT0U) && defined(CONFIG_SYS_IBAT0L) write_bat(IBAT0, CONFIG_SYS_IBAT0U, CONFIG_SYS_IBAT0L); +#endif write_bat(DBAT1, CONFIG_SYS_DBAT1U, CONFIG_SYS_DBAT1L); write_bat(IBAT1, CONFIG_SYS_IBAT1U, CONFIG_SYS_IBAT1L); write_bat(DBAT2, CONFIG_SYS_DBAT2U, CONFIG_SYS_DBAT2L); |