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authorStefan Roese <sr@denx.de>2006-10-24 16:06:48 (GMT)
committerStefan Roese <sr@denx.de>2006-10-24 16:13:43 (GMT)
commit7ade0c634a979c32fa91a74e8f5775f24651fbe6 (patch)
tree9b149c5693a44049daf19fad44a14fee34a44536 /cpu/ppc4xx/ndfc.c
parent8ae3b713b2286e0c3213b7802062e4c1599010de (diff)
downloadu-boot-7ade0c634a979c32fa91a74e8f5775f24651fbe6.tar.xz
Fix bug in PPC440 NAND driver cpu/ppc4xx/ndfc.c
Patch by Stefan Roese, 24 Oct 2006
Diffstat (limited to 'cpu/ppc4xx/ndfc.c')
-rw-r--r--cpu/ppc4xx/ndfc.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c
index 2c44111..3521731 100644
--- a/cpu/ppc4xx/ndfc.c
+++ b/cpu/ppc4xx/ndfc.c
@@ -144,16 +144,21 @@ static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len
void board_nand_select_device(struct nand_chip *nand, int chip)
{
+ /*
+ * Don't use "chip" to address the NAND device,
+ * generate the cs from the address where it is encoded.
+ */
+ int cs = (ulong)nand->IO_ADDR_W & 0x00000003;
ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc;
/* Set NandFlash Core Configuration Register */
/* 1col x 2 rows */
- out32(base + NDFC_CCR, 0x00000000 | (chip << 24));
+ out32(base + NDFC_CCR, 0x00000000 | (cs << 24));
}
void board_nand_init(struct nand_chip *nand)
{
- int chip = (ulong)nand->IO_ADDR_W & 0x00000003;
+ int cs = (ulong)nand->IO_ADDR_W & 0x00000003;
ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc;
nand->eccmode = NAND_ECC_SOFT;
@@ -181,8 +186,8 @@ void board_nand_init(struct nand_chip *nand)
/*
* Select required NAND chip in NDFC
*/
- board_nand_select_device(nand, chip);
- out32(base + NDFC_BCFG0 + (chip << 2), 0x80002222);
+ board_nand_select_device(nand, cs);
+ out32(base + NDFC_BCFG0 + (cs << 2), 0x80002222);
}
#endif