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author | Tom Rini <trini@konsulko.com> | 2017-04-18 15:36:06 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2017-04-18 15:36:06 (GMT) |
commit | 3c476d841daa491f87c8f07851038afbdf4d90a8 (patch) | |
tree | 131891877d7b9b112ebc8c05ab88d53b9b18b702 /drivers/crypto/fsl | |
parent | 9481f186d0bb06e492f62144cacdb5a8367e3cd2 (diff) | |
parent | e0dfec863e2ca5088dd797a5b6853d4c0df9002c (diff) | |
download | u-boot-3c476d841daa491f87c8f07851038afbdf4d90a8.tar.xz |
Merge git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'drivers/crypto/fsl')
-rw-r--r-- | drivers/crypto/fsl/jobdesc.c | 4 | ||||
-rw-r--r-- | drivers/crypto/fsl/jr.c | 21 |
2 files changed, 13 insertions, 12 deletions
diff --git a/drivers/crypto/fsl/jobdesc.c b/drivers/crypto/fsl/jobdesc.c index 6125bbb..375ff9d 100644 --- a/drivers/crypto/fsl/jobdesc.c +++ b/drivers/crypto/fsl/jobdesc.c @@ -204,7 +204,7 @@ void inline_cnstr_jobdesc_hash(uint32_t *desc, append_store(desc, dma_addr_out, storelen, LDST_CLASS_2_CCB | LDST_SRCDST_BYTE_CONTEXT); } - +#ifndef CONFIG_SPL_BUILD void inline_cnstr_jobdesc_blob_encap(uint32_t *desc, uint8_t *key_idnfr, uint8_t *plain_txt, uint8_t *enc_blob, uint32_t in_sz) @@ -252,7 +252,7 @@ void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr, append_operation(desc, OP_TYPE_DECAP_PROTOCOL | OP_PCLID_BLOB); } - +#endif /* * Descriptor to instantiate RNG State Handle 0 in normal mode and * load the JDKEK, TDKEK and TDSK registers diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index c33777f..986eabf 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -341,7 +341,9 @@ static void desc_done(uint32_t status, void *arg) { struct result *x = arg; x->status = status; +#ifndef CONFIG_SPL_BUILD caam_jr_strstatus(status); +#endif x->done = 1; } @@ -435,7 +437,11 @@ static inline int sec_reset_idx(uint8_t sec_idx) return 0; } - +int sec_reset(void) +{ + return sec_reset_idx(0); +} +#ifndef CONFIG_SPL_BUILD static int instantiate_rng(uint8_t sec_idx) { struct result op; @@ -471,11 +477,6 @@ static int instantiate_rng(uint8_t sec_idx) return ret; } -int sec_reset(void) -{ - return sec_reset_idx(0); -} - static u8 get_rng_vid(uint8_t sec_idx) { ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); @@ -560,7 +561,7 @@ static int rng_init(uint8_t sec_idx) return ret; } - +#endif int sec_init_idx(uint8_t sec_idx) { ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); @@ -585,7 +586,7 @@ int sec_init_idx(uint8_t sec_idx) * For AXI Read - Cacheable, Read allocate * Only For LS2080a, to solve CAAM coherency issues */ -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A mcr = (mcr & ~MCFGR_AWCACHE_MASK) | (0xb << MCFGR_AWCACHE_SHIFT); mcr = (mcr & ~MCFGR_ARCACHE_MASK) | (0x6 << MCFGR_ARCACHE_SHIFT); #else @@ -633,7 +634,7 @@ int sec_init_idx(uint8_t sec_idx) pamu_enable(); #endif - +#ifndef CONFIG_SPL_BUILD if (get_rng_vid(sec_idx) >= 4) { if (rng_init(sec_idx) < 0) { printf("SEC%u: RNG instantiation failed\n", sec_idx); @@ -641,7 +642,7 @@ int sec_init_idx(uint8_t sec_idx) } printf("SEC%u: RNG instantiated\n", sec_idx); } - +#endif return ret; } |