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author | Marek Vasut <marex@denx.de> | 2015-08-01 18:04:33 (GMT) |
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committer | Marek Vasut <marex@denx.de> | 2015-08-08 12:14:26 (GMT) |
commit | 1009e396ddef43da67924d252e9f0dac746ba738 (patch) | |
tree | 89faa3deaa8dca5c9060e05c3c04732d1d7641cd /drivers/ddr/altera/sdram.c | |
parent | b3bdb2204eb6a71330b4aa857e6edcc4c7145546 (diff) | |
download | u-boot-1009e396ddef43da67924d252e9f0dac746ba738.tar.xz |
ddr: altera: sdram: Clean up set_sdr_fifo_cfg()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/ddr/altera/sdram.c')
-rw-r--r-- | drivers/ddr/altera/sdram.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c index d8d04f4..8db8dde 100644 --- a/drivers/ddr/altera/sdram.c +++ b/drivers/ddr/altera/sdram.c @@ -405,14 +405,14 @@ static void set_sdr_static_cfg(void) static void set_sdr_fifo_cfg(void) { - debug("Configuring FIFOCFG\n"); - clrsetbits_le32(&sdr_ctrl->fifo_cfg, SDR_CTRLGRP_FIFOCFG_SYNCMODE_MASK, - CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE << - SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB); - - clrsetbits_le32(&sdr_ctrl->fifo_cfg, SDR_CTRLGRP_FIFOCFG_INCSYNC_MASK, - CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC << + const u32 fifo_cfg = + (CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE << + SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB) | + (CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC << SDR_CTRLGRP_FIFOCFG_INCSYNC_LSB); + + debug("Configuring FIFOCFG\n"); + writel(fifo_cfg, &sdr_ctrl->fifo_cfg); } static void set_sdr_mp_weight(void) |