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| author | Marek Vasut <marex@denx.de> | 2015-07-08 23:47:56 (GMT) |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-08-08 12:14:05 (GMT) |
| commit | 452a81e0786825d0a86c26d320b22055a387c749 (patch) | |
| tree | d20ab52625f0cfbb9dd4d264e7e8cf164ad491d2 /drivers/ddr/altera/sdram.c | |
| parent | 42f7ebb82bce6f145ded1a469b1377fee34d32fa (diff) | |
| download | u-boot-452a81e0786825d0a86c26d320b22055a387c749.tar.xz | |
ddr: altera: Fix typo in mp_threshold1 programming
It is the configuration data that should go into the register,
not the register mask, just like the surrounding code does it.
Fix this typo.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/ddr/altera/sdram.c')
| -rw-r--r-- | drivers/ddr/altera/sdram.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c index 45846de..90a4b2c 100644 --- a/drivers/ddr/altera/sdram.c +++ b/drivers/ddr/altera/sdram.c @@ -539,7 +539,7 @@ static void set_sdr_mp_threshold(void) clrsetbits_le32(&sdr_ctrl->mp_threshold1, SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_MASK, - SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_MASK << + CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 << SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_LSB); clrsetbits_le32(&sdr_ctrl->mp_threshold2, |