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author | Marek Vasut <marex@denx.de> | 2015-07-19 05:44:21 (GMT) |
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committer | Marek Vasut <marex@denx.de> | 2015-08-08 12:14:21 (GMT) |
commit | 3853d65e20465c71c7dff096a997b52d05b13489 (patch) | |
tree | b27e66a46cc27130a475b65d09880475618525b5 /drivers/ddr/altera | |
parent | 96df60364dc329f5de9b74494f1625916349ce62 (diff) | |
download | u-boot-3853d65e20465c71c7dff096a997b52d05b13489.tar.xz |
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 1
Clean up the debug output handling at the end of the function
and factor out common function call from the condition.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/ddr/altera')
-rw-r--r-- | drivers/ddr/altera/sequencer.c | 29 |
1 files changed, 16 insertions, 13 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index f7e2e40..c7ff863 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -1189,6 +1189,8 @@ static uint32_t rw_mgr_mem_calibrate_read_test(uint32_t rank_bgn, uint32_t group *bit_chk = param->read_correct_mask; correct_mask_vg = param->read_correct_mask_vg; + int ret; + uint32_t quick_read_mode = (((STATIC_CALIB_STEPS) & CALIB_SKIP_DELAY_SWEEPS) && ENABLE_SUPER_QUICK_CALIBRATION); @@ -1260,22 +1262,23 @@ static uint32_t rw_mgr_mem_calibrate_read_test(uint32_t rank_bgn, uint32_t group addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_RUN_SINGLE_GROUP_OFFSET; writel(RW_MGR_CLEAR_DQS_ENABLE, addr + (group << 2)); + set_rank_and_odt_mask(0, RW_MGR_ODT_MODE_OFF); + if (all_correct) { - set_rank_and_odt_mask(0, RW_MGR_ODT_MODE_OFF); - debug_cond(DLEVEL == 2, "%s:%d read_test(%u,ALL,%u) =>\ - (%u == %u) => %lu", __func__, __LINE__, group, - all_groups, *bit_chk, param->read_correct_mask, - (long unsigned int)(*bit_chk == - param->read_correct_mask)); - return *bit_chk == param->read_correct_mask; + ret = (*bit_chk == param->read_correct_mask); + debug_cond(DLEVEL == 2, + "%s:%d read_test(%u,ALL,%u) => (%u == %u) => %i\n", + __func__, __LINE__, group, all_groups, *bit_chk, + param->read_correct_mask, ret); } else { - set_rank_and_odt_mask(0, RW_MGR_ODT_MODE_OFF); - debug_cond(DLEVEL == 2, "%s:%d read_test(%u,ONE,%u) =>\ - (%u != %lu) => %lu\n", __func__, __LINE__, - group, all_groups, *bit_chk, (long unsigned int)0, - (long unsigned int)(*bit_chk != 0x00)); - return *bit_chk != 0x00; + ret = (*bit_chk != 0x00); + debug_cond(DLEVEL == 2, + "%s:%d read_test(%u,ONE,%u) => (%u != %u) => %i\n", + __func__, __LINE__, group, all_groups, *bit_chk, + 0, ret); } + + return ret; } /** |