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authorHaiying Wang <Haiying.Wang@freescale.com>2011-02-11 07:25:30 (GMT)
committerKumar Gala <galak@kernel.crashing.org>2011-04-05 15:18:39 (GMT)
commita52d2f816dac9cf516b4c795d44ce42cbe6aacb3 (patch)
tree1537649316d30b38f942321e83be20f6f47df84f /drivers/misc
parentc1fc2d4fc282fb59f42c82fd0b5e8255497093b5 (diff)
downloadu-boot-a52d2f816dac9cf516b4c795d44ce42cbe6aacb3.tar.xz
powerpc/85xx: Add P1021 specific QE and UEC support
P1021 has some QE pins which need to be set in pmuxcr register before using QE functions. In this patch, pin QE0 and QE3 are set for UCC1 and UCC5 in Eth mode. QE9 and QE12 are set for MII management. QE12 needs to be released after MII access because QE12 pin is muxed with LBCTL signal. Also added relevant QE support defines unique to P1021. The P1021 QE is shared on P1012, P1016, and P1025. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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