diff options
| author | Rajeshwari S Shinde <rajeshwari.s@samsung.com> | 2014-02-05 05:18:15 (GMT) |
|---|---|---|
| committer | Pantelis Antoniou <panto@antoniou-consulting.com> | 2014-02-07 15:42:26 (GMT) |
| commit | d3e016cc28684cd32d826a9414a0e89ccf80861a (patch) | |
| tree | 8ed71c5f9ff24fded82a3f6730cd28744e17a2cc /drivers/mmc/dw_mmc.c | |
| parent | def816a2ba87c2a3507536e8cb226f0f85bdae2c (diff) | |
| download | u-boot-d3e016cc28684cd32d826a9414a0e89ccf80861a.tar.xz | |
MMC: DWMMC: Correct the CLKDIV register value
This patch corrects the divider value written to CLKDIV register.
Since SDCLKIN is divided inside controller by the DIVRATIO value set
in the CLKSEL register, we need to use the same output clock value to
calculate the CLKDIV value.
as per user manual: cclk_in = SDCLKIN / (DIVRATIO + 1)
Input parameter to mmc_clk is changed to dwmci_host, since
we need the same to read DWMCI_CLKSEL register.
This improves the read timing values for channel 0 on SMDK5250
from 0.288sec to 0.144sec
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Diffstat (limited to 'drivers/mmc/dw_mmc.c')
| -rw-r--r-- | drivers/mmc/dw_mmc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 4cec5aa..d45c15c 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -237,7 +237,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) * host->bus_hz should be set from user. */ if (host->get_mmc_clk) - sclk = host->get_mmc_clk(host->dev_index); + sclk = host->get_mmc_clk(host); else if (host->bus_hz) sclk = host->bus_hz; else { |